mec1322: Added task-based Port80 POST code support.

With mec1322's EMI set to decode IO 0x800, it does not have any other
interfaces to support POST code via IO 0x80.

This change is to enable Port80 POST code support via polling method.

Limitation:
- POST Code 0xFF will be ignored.
- POST Code frequency is greater than 1 msec.

BUG=chrome-os-partner:39386
TEST=Verified Port80 POST code is captured in EC console.
     Verified "port80 task" console command will disable/enable Port80 task.
     Verified "port80 poll" will get the last Port80 POST code.
BRANCH=none

Change-Id: I27e53e84b5be1fd98464a44407dd58b93d8c798d
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/266783
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This commit is contained in:
Kevin K Wong
2015-04-20 17:48:21 -07:00
committed by ChromeOS Commit Bot
parent b35e4d47fc
commit 5a18413ff5
11 changed files with 105 additions and 0 deletions

View File

@@ -27,6 +27,8 @@
#define CONFIG_EXTPOWER_GPIO
#define CONFIG_I2C
#define CONFIG_PORT80_TASK_EN
#define CONFIG_CHARGER
#define CONFIG_BATTERY_SMART
#define CONFIG_CHARGER_V2

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@@ -23,6 +23,7 @@
TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE) \
TASK_NOTEST(PORT80, port80_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(POWERBTN, power_button_task, NULL, TASK_STACK_SIZE) \
TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE)

View File

@@ -12,6 +12,7 @@
/* #define CONFIG_BACKLIGHT_LID */
/* #define CONFIG_BATTERY_SMART */
#define CONFIG_BOARD_VERSION
#define CONFIG_PORT80_TASK_EN
#if 0
#define CONFIG_CHARGER

View File

@@ -23,5 +23,6 @@
TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE) \
TASK_NOTEST(PORT80, port80_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(POWERBTN, power_button_task, NULL, TASK_STACK_SIZE) \
TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE)

View File

@@ -26,6 +26,8 @@
#define CONFIG_POWER_COMMON
#define CONFIG_EXTPOWER_GPIO
#define CONFIG_PORT80_TASK_EN
#define CONFIG_SPI_PORT 1
#define CONFIG_SPI_CS_GPIO GPIO_PVT_CS0
#define CONFIG_SPI_FLASH

View File

@@ -24,5 +24,6 @@
TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE) \
TASK_NOTEST(PORT80, port80_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(POWERBTN, power_button_task, NULL, TASK_STACK_SIZE) \
TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE)

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@@ -239,6 +239,10 @@ static void setup_lpc(void)
MEC1322_EMI_MRL0 = 0x200;
MEC1322_EMI_MWL0 = 0x100;
/* Set up Mailbox for Port80 trapping */
MEC1322_MBX_INDEX = 0xff;
MEC1322_LPC_MAILBOX_BAR = 0x00808901;
/* We support LPC args and version 3 protocol */
*(lpc_get_memmap_range() + EC_MEMMAP_HOST_CMD_FLAGS) =
EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED |
@@ -294,6 +298,29 @@ void emi_interrupt(void)
}
DECLARE_IRQ(MEC1322_IRQ_EMI, emi_interrupt, 1);
#ifdef HAS_TASK_PORT80
/*
* Port80 POST code polling limitation:
* - POST code 0xFF is ignored.
*/
int port_80_read(void)
{
int data;
/* read MBX_INDEX for POST code */
data = MEC1322_MBX_INDEX;
/* clear MBX_INDEX for next POST code*/
MEC1322_MBX_INDEX = 0xff;
/* mark POST code 0xff as invalid */
if (data == 0xff)
data = PORT_80_IGNORE;
return data;
}
#endif
void acpi_0_interrupt(void)
{
uint8_t value, result, is_cmd;

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@@ -175,6 +175,10 @@ static inline uintptr_t gpio_port_base(int port_id)
/* Mailbox */
#define MEC1322_MBX_RT_BASE 0x400f2400
#define MEC1322_MBX_INDEX REG8(MEC1322_MBX_RT_BASE + 0x0)
#define MEC1322_MBX_DATA REG8(MEC1322_MBX_RT_BASE + 0x1)
#define MEC1322_MBX_BASE 0x400f2500
#define MEC1322_MBX_H2E_MBX REG8(MEC1322_MBX_BASE + 0x0)
#define MEC1322_MBX_E2H_MBX REG8(MEC1322_MBX_BASE + 0x4)

View File

@@ -9,17 +9,24 @@
#include "console.h"
#include "host_command.h"
#include "port80.h"
#include "task.h"
#include "timer.h"
#include "util.h"
#define CPRINTF(format, args...) cprintf(CC_PORT80, format, ## args)
#define HISTORY_LEN 256
#define PORT80_POLL_PERIOD MSEC
static uint16_t history[HISTORY_LEN];
static int writes; /* Number of port 80 writes so far */
static int last_boot; /* Last code from previous boot */
static int scroll;
static int print_in_int = 1;
#ifdef HAS_TASK_PORT80
static int task_en; /* Port 80 task control */
static int task_timeout = -1;
#endif
void port_80_write(int data)
{
@@ -43,6 +50,30 @@ void port_80_write(int data)
writes++;
}
#ifdef HAS_TASK_PORT80
/*
* Port80 POST code polling limitation:
* - POST code 0xFF is ignored.
* - POST code frequency is greater than 1 msec.
*/
void port80_task(void)
{
#ifdef CONFIG_PORT80_TASK_EN
task_en = 1;
task_timeout = PORT80_POLL_PERIOD;
#endif
while (1) {
int data = port_80_read();
if (data != PORT_80_IGNORE)
port_80_write(data);
task_wait_event(task_timeout);
}
}
#endif
/*****************************************************************************/
/* Console commands */
@@ -69,6 +100,22 @@ static int command_port80(int argc, char **argv)
} else if (!strcasecmp(argv[1], "flush")) {
writes = 0;
return EC_SUCCESS;
#ifdef HAS_TASK_PORT80
} else if (!strcasecmp(argv[1], "task")) {
task_en = !task_en;
ccprintf("task %sabled\n", task_en ? "en" : "dis");
if (task_en) {
task_timeout = PORT80_POLL_PERIOD;
task_wake(TASK_ID_PORT80);
} else
task_timeout = -1;
return EC_SUCCESS;
} else if (!strcasecmp(argv[1], "poll")) {
i = port_80_read();
if (i != PORT_80_IGNORE)
port_80_write(i);
/* continue on to print the port 80 history */
#endif
} else {
return EC_ERROR_PARAM1;
}

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@@ -1005,6 +1005,14 @@
/*****************************************************************************/
/*
* Enable polling at boot by port 80 task.
* Ignored if port 80 is handled by interrupt
*/
#undef CONFIG_PORT80_TASK_EN
/*****************************************************************************/
/* Compile common code to support power button debouncing */
#undef CONFIG_POWER_BUTTON

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@@ -13,6 +13,7 @@
enum port_80_event {
PORT_80_EVENT_RESUME = 0x1001, /* S3->S0 transition */
PORT_80_EVENT_RESET = 0x1002, /* RESET transition */
PORT_80_IGNORE = 0xffff, /* Invalid POST CODE */
};
/**
@@ -22,4 +23,14 @@ enum port_80_event {
*/
void port_80_write(int data);
#ifdef HAS_TASK_PORT80
/**
* Chip specific function to read from port 80.
*
* @return data from the last LPC write to port 80,
* or PORT_80_IGNORE if no data is available.
*/
int port_80_read(void);
#endif
#endif /* __CROS_EC_PORT80_H */