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i2c: Retry i2c operation if fails on nack'd(EC_ERROR_BUSY).
Retry count is defined by CONFIG_I2C_NACK_RETRY_COUNT. BUG=chrome-os-partner:37494 TEST=Tested on Cyan, observed retry happens on nack'd i2c. BRANCH=None Signed-off-by: li feng <li1.feng@intel.com> Change-Id: I73ed15a52335de6c5a5b647660bfe431a8238716 Reviewed-on: https://chromium-review.googlesource.com/274689 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Divya Jyothi <divya.jyothi@intel.com> Tested-by: Divya Jyothi <divya.jyothi@intel.com>
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ChromeOS Commit Bot
parent
f64945d8d1
commit
5b2e673948
@@ -79,6 +79,9 @@
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#define I2C_PORT_ACCEL MEC1322_I2C1
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#define I2C_PORT_THERMAL MEC1322_I2C3
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#undef CONFIG_I2C_NACK_RETRY_COUNT
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#define CONFIG_I2C_NACK_RETRY_COUNT 2
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/* power signal definitions */
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enum power_signal {
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X86_ALL_SYS_PWRGD = 0,
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@@ -229,6 +229,7 @@ int chip_i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_size,
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int skip = 0;
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int bytes_to_read;
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uint8_t reg;
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int ret_done;
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if (out_size == 0 && in_size == 0)
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return EC_SUCCESS;
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@@ -272,11 +273,13 @@ int chip_i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_size,
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}
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for (i = 0; i < out_size; ++i) {
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if (wait_byte_done(controller))
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ret_done = wait_byte_done(controller);
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if (ret_done)
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goto err_chip_i2c_xfer;
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MEC1322_I2C_DATA(controller) = out[i];
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}
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if (wait_byte_done(controller))
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ret_done = wait_byte_done(controller);
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if (ret_done)
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goto err_chip_i2c_xfer;
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/*
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@@ -320,12 +323,14 @@ int chip_i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_size,
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bytes_to_read = send_stop ? in_size - 2 : in_size;
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for (i = 0; i < bytes_to_read; ++i) {
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if (wait_byte_done(controller))
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ret_done = wait_byte_done(controller);
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if (ret_done)
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goto err_chip_i2c_xfer;
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push_in_buf(&in, MEC1322_I2C_DATA(controller), skip);
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skip = 0;
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}
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if (wait_byte_done(controller))
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ret_done = wait_byte_done(controller);
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if (ret_done)
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goto err_chip_i2c_xfer;
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if (send_stop) {
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@@ -335,7 +340,8 @@ int chip_i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_size,
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*/
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MEC1322_I2C_CTRL(controller) = CTRL_ESO | CTRL_ENI;
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push_in_buf(&in, MEC1322_I2C_DATA(controller), skip);
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if (wait_byte_done(controller))
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ret_done = wait_byte_done(controller);
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if (ret_done)
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goto err_chip_i2c_xfer;
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/* Send STOP */
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@@ -362,7 +368,12 @@ err_chip_i2c_xfer:
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/* Send STOP and return error */
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MEC1322_I2C_CTRL(controller) = CTRL_PIN | CTRL_ESO |
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CTRL_STO | CTRL_ACK;
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return EC_ERROR_UNKNOWN;
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if (ret_done == STS_LRB)
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return EC_ERROR_BUSY;
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else if (ret_done == EC_ERROR_TIMEOUT)
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return EC_ERROR_TIMEOUT;
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else
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return EC_ERROR_UNKNOWN;
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}
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int i2c_raw_get_scl(int port)
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12
common/i2c.c
12
common/i2c.c
@@ -36,8 +36,16 @@ static struct mutex port_mutex[I2C_CONTROLLER_COUNT];
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int i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_size,
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uint8_t *in, int in_size, int flags)
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{
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return chip_i2c_xfer(port, slave_addr, out, out_size, in,
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in_size, flags);
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int i;
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int ret = EC_SUCCESS;
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for (i = 0; i <= CONFIG_I2C_NACK_RETRY_COUNT; i++) {
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ret = chip_i2c_xfer(port, slave_addr, out, out_size, in,
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in_size, flags);
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if (ret != EC_ERROR_BUSY)
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break;
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}
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return ret;
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}
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void i2c_lock(int port, int lock)
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@@ -805,6 +805,8 @@
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#undef CONFIG_I2C_PASSTHROUGH
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#undef CONFIG_I2C_PASSTHRU_RESTRICTED
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/* Defines I2C operation retry count when slave nack'd(EC_ERROR_BUSY) */
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#define CONFIG_I2C_NACK_RETRY_COUNT 0
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/*
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* I2C SCL gating.
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*
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@@ -1381,7 +1383,7 @@
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/* Compile chip support for the USB device controller */
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#undef CONFIG_USB
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/* USB device buffers and descriptors in dedicated RAM */
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/* USB device buffers and descriptors */
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#undef CONFIG_USB_RAM_ACCESS_SIZE
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#undef CONFIG_USB_RAM_ACCESS_TYPE
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#undef CONFIG_USB_RAM_BASE
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