MEC1322 port80 Acknowledge interrupt

In normal operation the 16 bit timer number 1 is set up to count every
microsecond, and every 1000 counts (i.e. every millisecond) to assert an
IRQ (Interrupt Request). After a microsecond the IRQ is deasserted.when
the count is again not at its limit.

The IRQ handler ignores the IRQ from the timer itself.

If the clock is stopped or the autoreload of the counter is disabled
then the value of the count is left unchanged. If this count is the
limit then the IRQ will remain asserted. For stopping the clock this is
approximatly a 1 in 1000 chance, or is certain if the autoreload is
disabled.

If the IRQ from the timer continues to be asserted, then the NVIC will
continue to generate a fresh call to the IRQ handler as each previous
exception completes.

The fix is to do what almost every IRQ handler does for almost every
processor, and clear the request in the peripheral that is causing the
interrupt, rather than hoping that the timer will clear it itself. This
agrees with how the event timer is used. There may be a lurking bug in
the system timer handler as well as it also expects the timer to clear
its own IRQ.

BUG=chrome-os-partner:48499
TEST=Pass 2000s of continuous calls to port_80_interrupt_disable() /
port_80_interrupt_enable() without WDT being triggered. Stop the
autoreload and see it doesn't watchdog.
BRANCH=glados

Change-Id: I4726854b7784e2e4a39b8cb74c350206d71f90df
Signed-off-by: Icarus Sparry <icarus.w.sparry@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/326781
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>

chip/mec1322/port80.c

@@ -16,7 +16,7 @@
 void port_80_interrupt(void)
 {
 	int data;
-
+	MEC1322_TMR16_STS(1) = 1; /* Ack the interrupt */
 	if ((1 << 1) & MEC1322_INT_RESULT(23)) {
 		data = port_80_read();