mirror of
https://github.com/Telecominfraproject/OpenCellular.git
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cleanup: Remove lucid and snoball boards
BUG=None TEST=`make buildall -j` BRANCH=None Change-Id: I667e471d4d9187f530da7ae8807c8aa339a17847 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/663817 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
This commit is contained in:
Shawn Nematbakhsh
committed by
chrome-bot
chrome-bot
parent
f6ac571153
commit
5ec58b35f1
@@ -1,202 +0,0 @@
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/* Copyright 2015 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* Battery pack vendor provided charging profile
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*/
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#include "battery.h"
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#include "battery_smart.h"
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#include "charge_state.h"
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#include "console.h"
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#include "ec_commands.h"
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#include "i2c.h"
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#include "util.h"
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/* Shutdown mode parameter to write to manufacturer access register */
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#define PARAM_CUT_OFF_LOW 0x10
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#define PARAM_CUT_OFF_HIGH 0x00
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/* Battery info for BQ40Z55 */
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static const struct battery_info info = {
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.voltage_max = 4350, /* mV */
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.voltage_normal = 3800,
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.voltage_min = 3000,
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.precharge_current = 256, /* mA */
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.start_charging_min_c = 0,
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.start_charging_max_c = 55,
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.charging_min_c = 0,
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.charging_max_c = 60,
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.discharging_min_c = -20,
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.discharging_max_c = 60,
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};
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const struct battery_info *battery_get_info(void)
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{
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return &info;
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}
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int board_cut_off_battery(void)
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{
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int rv;
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uint8_t buf[3];
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/* Ship mode command must be sent twice to take effect */
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buf[0] = SB_MANUFACTURER_ACCESS & 0xff;
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buf[1] = PARAM_CUT_OFF_LOW;
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buf[2] = PARAM_CUT_OFF_HIGH;
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i2c_lock(I2C_PORT_BATTERY, 1);
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rv = i2c_xfer(I2C_PORT_BATTERY, BATTERY_ADDR, buf, 3, NULL, 0,
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I2C_XFER_SINGLE);
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rv |= i2c_xfer(I2C_PORT_BATTERY, BATTERY_ADDR, buf, 3, NULL, 0,
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I2C_XFER_SINGLE);
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i2c_lock(I2C_PORT_BATTERY, 0);
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return rv;
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}
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#ifdef CONFIG_CHARGER_PROFILE_OVERRIDE
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static int fast_charging_allowed = 1;
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/*
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* This can override the smart battery's charging profile. To make a change,
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* modify one or more of requested_voltage, requested_current, or state.
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* Leave everything else unchanged.
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*
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* Return the next poll period in usec, or zero to use the default (which is
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* state dependent).
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*/
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int charger_profile_override(struct charge_state_data *curr)
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{
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/* temp in 0.1 deg C */
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int temp_c = curr->batt.temperature - 2731;
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/* keep track of last temperature range for hysteresis */
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static enum {
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TEMP_LOW,
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TEMP_NORMAL,
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TEMP_HIGH,
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} temp_range = TEMP_NORMAL;
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/* keep track of last voltage range for hysteresis */
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static enum {
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VOLTAGE_RANGE_LOW,
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VOLTAGE_RANGE_HIGH,
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} voltage_range = VOLTAGE_RANGE_LOW;
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/* Current and previous battery voltage */
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int batt_voltage;
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static int prev_batt_voltage;
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/*
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* Determine temperature range. The five ranges are:
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* < 15C
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* 15-45C
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* > 45C
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*
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* Add 0.2 degrees of hysteresis.
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* If temp reading was bad, use last range.
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*/
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if (!(curr->batt.flags & BATT_FLAG_BAD_TEMPERATURE)) {
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if (temp_c < 149)
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temp_range = TEMP_LOW;
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else if (temp_c > 151 && temp_c < 449)
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temp_range = TEMP_NORMAL;
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else if (temp_c > 451)
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temp_range = TEMP_HIGH;
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}
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/*
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* If battery voltage reading is bad, use the last reading. Otherwise,
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* determine voltage range with hysteresis.
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*/
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if (curr->batt.flags & BATT_FLAG_BAD_VOLTAGE) {
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batt_voltage = prev_batt_voltage;
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} else {
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batt_voltage = prev_batt_voltage = curr->batt.voltage;
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if (batt_voltage < 4050)
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voltage_range = VOLTAGE_RANGE_LOW;
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else if (batt_voltage > 4150)
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voltage_range = VOLTAGE_RANGE_HIGH;
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}
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/*
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* If we are not charging or we aren't using fast charging profiles,
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* then do not override desired current and voltage.
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*/
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if (curr->state != ST_CHARGE || !fast_charging_allowed)
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return 0;
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/*
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* Okay, impose our custom will:
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* When battery is 0-15C:
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* CC at 1.8A @ 4.35V
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* CV at 4.35V
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*
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* When battery is <45C:
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* CC at 6A until 4.15V @ 4.35V
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* CC at 3A @ 4.35V
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* CV at 4.35V until current drops to 3A
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*
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* When battery is >45C:
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* CC at 4.2A @ 4.1V
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* CV at 4.1V (when battery is hot we don't go to fully charged)
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*/
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switch (temp_range) {
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case TEMP_LOW:
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curr->requested_current = 1800;
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curr->requested_voltage = 4350;
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break;
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case TEMP_NORMAL:
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curr->requested_voltage = 4350;
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if (voltage_range == VOLTAGE_RANGE_LOW)
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curr->requested_current = 6000;
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else
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curr->requested_current = 3000;
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break;
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case TEMP_HIGH:
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curr->requested_current = 4200;
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curr->requested_voltage = 4100;
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break;
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}
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return 0;
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}
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/* Customs options controllable by host command. */
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#define PARAM_FASTCHARGE (CS_PARAM_CUSTOM_PROFILE_MIN + 0)
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enum ec_status charger_profile_override_get_param(uint32_t param,
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uint32_t *value)
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{
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if (param == PARAM_FASTCHARGE) {
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*value = fast_charging_allowed;
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return EC_RES_SUCCESS;
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}
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return EC_RES_INVALID_PARAM;
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}
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enum ec_status charger_profile_override_set_param(uint32_t param,
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uint32_t value)
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{
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if (param == PARAM_FASTCHARGE) {
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fast_charging_allowed = value;
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return EC_RES_SUCCESS;
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}
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return EC_RES_INVALID_PARAM;
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}
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static int command_fastcharge(int argc, char **argv)
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{
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if (argc > 1 && !parse_bool(argv[1], &fast_charging_allowed))
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return EC_ERROR_PARAM1;
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ccprintf("fastcharge %s\n", fast_charging_allowed ? "on" : "off");
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return EC_SUCCESS;
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}
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DECLARE_CONSOLE_COMMAND(fastcharge, command_fastcharge,
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"[on|off]",
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"Get or set fast charging profile");
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#endif /* CONFIG_CHARGER_PROFILE_OVERRIDE */
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@@ -1,195 +0,0 @@
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/* Copyright 2015 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* lucid board configuration */
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#include "adc.h"
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#include "adc_chip.h"
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#include "charge_manager.h"
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#include "charge_state.h"
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#include "charger_detect.h"
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#include "common.h"
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#include "console.h"
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#include "extpower.h"
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#include "gpio.h"
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#include "hooks.h"
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#include "i2c.h"
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#include "led_common.h"
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#include "registers.h"
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#include "task.h"
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#include "temp_sensor.h"
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#include "usb_charge.h"
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#include "usb_pd.h"
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#include "util.h"
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#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
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#define USB_CHG_DETECT_DELAY_US 5000
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void board_config_pre_init(void)
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{
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/* enable SYSCFG clock */
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STM32_RCC_APB2ENR |= 1 << 0;
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/*
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* the DMA mapping is :
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* Chan 2 : TIM1_CH1 (C0 RX)
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* Chan 3 : SPI1_TX (C0 TX)
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* Chan 4 : USART1_TX
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* Chan 5 : USART1_RX
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*/
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/*
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* Remap USART1 RX/TX DMA to match uart driver.
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*/
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STM32_SYSCFG_CFGR1 |= (1 << 9) | (1 << 10);
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}
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static void reset_charge(int port)
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{
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struct charge_port_info charge_none;
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charge_none.voltage = USB_CHARGER_VOLTAGE_MV;
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charge_none.current = 0;
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charge_manager_update_charge(CHARGE_SUPPLIER_PROPRIETARY,
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port,
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&charge_none);
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charge_manager_update_charge(CHARGE_SUPPLIER_BC12_CDP,
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port,
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&charge_none);
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charge_manager_update_charge(CHARGE_SUPPLIER_BC12_DCP,
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port,
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&charge_none);
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charge_manager_update_charge(CHARGE_SUPPLIER_BC12_SDP,
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port,
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&charge_none);
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charge_manager_update_charge(CHARGE_SUPPLIER_OTHER,
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port,
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&charge_none);
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}
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static void usb_charger_bc12_detect(void)
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{
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int type;
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struct charge_port_info charge;
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type = charger_detect_get_device_type();
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if (gpio_get_level(GPIO_AC_PRESENT) && type) {
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charge.voltage = USB_CHARGER_VOLTAGE_MV;
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if (type == CHARGE_SUPPLIER_BC12_CDP)
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charge.current = 1500;
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else
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charge.current = 500;
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charge_manager_update_charge(type, 0, &charge);
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} else
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reset_charge(0);
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/* notify host of power info change */
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pd_send_host_event(PD_EVENT_POWER_CHANGE);
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}
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DECLARE_DEFERRED(usb_charger_bc12_detect);
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static void update_vbus_supplier(int vbus_level)
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{
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struct charge_port_info charge;
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charge.voltage = USB_CHARGER_VOLTAGE_MV;
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charge.current = vbus_level ? USB_CHARGER_MIN_CURR_MA : 0;
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charge_manager_update_charge(CHARGE_SUPPLIER_VBUS, 0, &charge);
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}
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void vbus_evt(enum gpio_signal signal)
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{
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/*
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* We are using AC_PRESENT signal to detect VBUS presence since
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* lucid only has one port and charging is always enabled.
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*/
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hook_call_deferred(&usb_charger_bc12_detect_data,
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USB_CHG_DETECT_DELAY_US);
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update_vbus_supplier(gpio_get_level(signal));
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task_wake(TASK_ID_PD_C0);
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/* trigger AC present interrupt */
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extpower_interrupt(signal);
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}
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void charge_state_interrupt(enum gpio_signal signal)
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{
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led_enable(gpio_get_level(signal));
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}
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#include "gpio_list.h"
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/* ADC channels */
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const struct adc_t adc_channels[] = {
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/* USB PD CC lines sensing. Converted to mV (3300mV/4096). */
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[ADC_C0_CC1_PD] = {"C0_CC1_PD", 3300, 4096, 0, STM32_AIN(1)},
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[ADC_C0_CC2_PD] = {"C0_CC2_PD", 3300, 4096, 0, STM32_AIN(3)},
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/* Vbus sensing. Converted to mV, full ADC is equivalent to 33.5V. */
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[ADC_VBUS] = {"VBUS", 33550, 4096, 0, STM32_AIN(7)},
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};
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BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
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/* I2C ports */
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const struct i2c_port_t i2c_ports[] = {
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{"master", I2C_PORT_MASTER, 100,
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GPIO_MASTER_I2C_SCL, GPIO_MASTER_I2C_SDA},
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{"slave", I2C_PORT_SLAVE, 100,
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GPIO_SLAVE_I2C_SCL, GPIO_SLAVE_I2C_SDA},
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};
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const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
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const struct temp_sensor_t temp_sensors[] = {
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{"Battery", TEMP_SENSOR_TYPE_BATTERY, charge_get_battery_temp, 0, 4},
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};
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BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
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/* Initialize board. */
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static void board_init(void)
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{
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int i;
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/* Initialize all BC1.2 charge suppliers to 0 */
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for (i = 0; i < CONFIG_USB_PD_PORT_COUNT; i++)
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reset_charge(i);
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/* Enable charge status interrupt */
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gpio_enable_interrupt(GPIO_CHARGE_STATUS);
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/* Initialize VBUS supplier based on whether or not VBUS is present */
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update_vbus_supplier(gpio_get_level(GPIO_AC_PRESENT));
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}
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DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
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int board_set_active_charge_port(int charge_port)
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{
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/* Only one port and it's always enabled */
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return EC_SUCCESS;
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}
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void board_set_charge_limit(int port, int supplier, int charge_ma,
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int max_ma, int charge_mv)
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{
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int rv;
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charge_ma = MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT);
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rv = charge_set_input_current_limit(charge_ma, charge_mv);
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if (rv < 0)
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CPRINTS("Failed to set input current limit for PD");
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}
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/**
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* Custom physical check of battery presence.
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*/
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enum battery_present battery_is_present(void)
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{
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return gpio_get_level(GPIO_BAT_PRESENT) ? BP_YES : BP_NO;
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}
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void pd_send_host_event(int mask)
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{
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}
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@@ -1,130 +0,0 @@
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/* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
/* lucid board configuration */
|
||||
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||||
#ifndef __CROS_EC_BOARD_H
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#define __CROS_EC_BOARD_H
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/* 48 MHz SYSCLK clock frequency */
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#define CPU_CLOCK 48000000
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/* the UART console is on USART1 (PA9/PA10) */
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#undef CONFIG_UART_CONSOLE
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#define CONFIG_UART_CONSOLE 1
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/* Optional features */
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#define CONFIG_ADC
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#undef CONFIG_ADC_WATCHDOG
|
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#define CONFIG_BATTERY_CUT_OFF
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#define CONFIG_BATTERY_PRESENT_CUSTOM
|
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#define CONFIG_BATTERY_SMART
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#define CONFIG_BOARD_PRE_INIT
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#define CONFIG_CHARGE_MANAGER
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#define CONFIG_CHARGER
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#define CONFIG_CHARGER_V2
|
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#define CONFIG_CHARGER_DISCHARGE_ON_AC
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||||
#define CONFIG_CHARGER_BQ24773
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#define CONFIG_CHARGER_ILIM_PIN_DISABLED
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#define CONFIG_CHARGER_INPUT_CURRENT 500
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#define CONFIG_CHARGER_PROFILE_OVERRIDE
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#define CONFIG_CHARGER_SENSE_RESISTOR 5
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#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10
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#undef CONFIG_CMD_I2C_SCAN
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#undef CONFIG_CMD_IDLE_STATS
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#undef CONFIG_CMD_SHMEM
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#undef CONFIG_CMD_TIMERINFO
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||||
#undef CONFIG_CONSOLE_CMDHELP
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||||
#undef CONFIG_CONSOLE_HISTORY
|
||||
#undef CONFIG_DEBUG_ASSERT
|
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#define CONFIG_EXTPOWER_GPIO
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#define CONFIG_FORCE_CONSOLE_RESUME
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#define CONFIG_HIBERNATE_WAKEUP_PINS (STM32_PWR_CSR_EWUP2)
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#define CONFIG_HOSTCMD_ALIGNED
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#define CONFIG_HW_CRC
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#define CONFIG_I2C
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#define CONFIG_I2C_MASTER
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#define CONFIG_I2C_SLAVE
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#define CONFIG_LED_COMMON
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#undef CONFIG_LID_SWITCH
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#define CONFIG_LOW_POWER_IDLE
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#define CONFIG_LTO
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#define CONFIG_RSA
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#define CONFIG_RWSIG
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||||
#define CONFIG_RWSIG_TYPE_USBPD1
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#define CONFIG_SHA256
|
||||
#define CONFIG_STM_HWTIMER32
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#define CONFIG_STM32_CHARGER_DETECT
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#undef CONFIG_TASK_PROFILING
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#define CONFIG_TEMP_SENSOR
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#define CONFIG_USB_POWER_DELIVERY
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||||
#define CONFIG_USB_PD_ALT_MODE
|
||||
#define CONFIG_USB_PD_ALT_MODE_DFP
|
||||
#define CONFIG_USB_PD_DEBUG_LEVEL 0
|
||||
#define CONFIG_USB_PD_DUAL_ROLE
|
||||
#define CONFIG_USB_PD_INTERNAL_COMP
|
||||
#define CONFIG_USB_PD_PORT_COUNT 1
|
||||
#define CONFIG_USB_PD_TCPC
|
||||
#define CONFIG_USB_PD_TCPM_STUB
|
||||
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
|
||||
#undef CONFIG_WATCHDOG_HELP
|
||||
|
||||
/* Use PSTATE embedded in the RO image, not in its own erase block */
|
||||
#undef CONFIG_FLASH_PSTATE_BANK
|
||||
#undef CONFIG_FW_PSTATE_SIZE
|
||||
#define CONFIG_FW_PSTATE_SIZE 0
|
||||
|
||||
/* I2C ports configuration */
|
||||
#define I2C_PORT_MASTER 1
|
||||
#define I2C_PORT_SLAVE 0
|
||||
#define I2C_PORT_EC I2C_PORT_SLAVE
|
||||
#define I2C_PORT_CHARGER I2C_PORT_MASTER
|
||||
#define I2C_PORT_BATTERY I2C_PORT_MASTER
|
||||
|
||||
/* slave address for host commands */
|
||||
#define CONFIG_HOSTCMD_I2C_SLAVE_ADDR 0x3c
|
||||
|
||||
/* Allow dangerous commands */
|
||||
#define CONFIG_SYSTEM_UNLOCKED
|
||||
|
||||
/* No Write-protect GPIO, force the write-protection */
|
||||
#define CONFIG_WP_ALWAYS
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
|
||||
/* Timer selection */
|
||||
#define TIM_CLOCK32 2
|
||||
#define TIM_ADC 3
|
||||
|
||||
#include "gpio_signal.h"
|
||||
|
||||
/* ADC signal */
|
||||
enum adc_channel {
|
||||
ADC_C0_CC1_PD = 0,
|
||||
ADC_C0_CC2_PD,
|
||||
ADC_VBUS,
|
||||
/* Number of ADC channels */
|
||||
ADC_CH_COUNT
|
||||
};
|
||||
|
||||
enum temp_sensor_id {
|
||||
TEMP_SENSOR_BATTERY,
|
||||
|
||||
TEMP_SENSOR_COUNT
|
||||
};
|
||||
|
||||
/* we are never a source : don't care about power supply */
|
||||
#define PD_POWER_SUPPLY_TURN_ON_DELAY 0 /* us */
|
||||
#define PD_POWER_SUPPLY_TURN_OFF_DELAY 0 /* us */
|
||||
|
||||
/* Define typical operating power and max power */
|
||||
#define PD_OPERATING_POWER_MW 10000
|
||||
#define PD_MAX_POWER_MW 60000
|
||||
#define PD_MAX_CURRENT_MA 3000
|
||||
#define PD_MAX_VOLTAGE_MV 20000
|
||||
|
||||
#endif /* !__ASSEMBLER__ */
|
||||
|
||||
#endif /* __CROS_EC_BOARD_H */
|
||||
@@ -1,15 +0,0 @@
|
||||
# -*- makefile -*-
|
||||
# Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
# Use of this source code is governed by a BSD-style license that can be
|
||||
# found in the LICENSE file.
|
||||
#
|
||||
# Board specific files build
|
||||
|
||||
# the IC is STmicro STM32F072CBU7
|
||||
CHIP:=stm32
|
||||
CHIP_FAMILY:=stm32f0
|
||||
CHIP_VARIANT:=stm32f07x
|
||||
|
||||
board-y=board.o led.o
|
||||
board-$(CONFIG_BATTERY_SMART)+=battery.o
|
||||
board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o
|
||||
@@ -1,27 +0,0 @@
|
||||
-----BEGIN RSA PRIVATE KEY-----
|
||||
MIIEowIBAAKCAQEAumgqFqKT/mqNXNBx25sGLSV1Xlkbe1xsnAYFMo6tMI8bxpOl
|
||||
R40jZNI90NJZdZTbW7Fyic08Nj34n17cOpL1vFALjvi1TRafBJ9UQ6kBxAxy2kYX
|
||||
HNJNRB9svcdNcOA5E5SL3EmAxh69+fUlbNo0zUpr/y8WGAIpTERQqY5Pf5BpThhD
|
||||
jshxoPrbaYQ+O5wHcAlIphYZYg/HuuU9UeI5NeFKUyfsHWpEp48vuAjN17SDFBi6
|
||||
89Sme+bfjUfLEo5I4/1qmkZ4fR7zB1UB1nvwmWaAnWmeHHxrn/Pqn/MT81JHIijB
|
||||
tA/rLQZRXmAMWBK8FKcjUrdgPsPA3L29cLPBiwIDAQABAoIBABrT0vre+x2qiB3L
|
||||
ghdxADqPIY0qleHzM05hL25PSm2qqvyxUyAxF97ywyLCo01g1xEjQLDEcN39nUKS
|
||||
jG+BpwwrGP7CnJUzpD8uDxqNwEtO31i6rajgO26Kd0P44xRTsOM4hch2a6oX0o+e
|
||||
0HwSC3dgNprLVAqwhPENA+7jJF3fU6Setdbkce04HU7yWZljjTdH0pNewHPwwQpr
|
||||
S3dzPzm6r4SyivFcsosqoe+ii6xtlWVtz8ipZsy8wWJMaYrICrl4wQojDGEsW+cW
|
||||
MeEgh2nI7PcY78N3fpCABlbo66ULA/+NanrBVw0I7O84FgYQ/39v5fuPUr2DmYia
|
||||
HEEGj8ECgYEA70sAuOcYxUWq+olEJxltRjN8vfY+j3LiAq7W7fx5ZQ+Aqtk2KR8n
|
||||
3Qrrsu555zPRveyW7lE2WiqLMKI6SGIYeXE2jZR1u1O0wjTOEmPFnu8388rQQ1v3
|
||||
ui7ZyZBvuxWSShZuuKif2WX6T60a7YA3SY21WrDxDvSc4LW6E5SbhycCgYEAx2vn
|
||||
RXRhe6x25M9Sv76YiVs+wfgce79gcZTzAi1GVynMuK43sDa5Saa0EXZGSeXcNOVp
|
||||
VsX6mCXVw1q4Equj6QdrKj5gTeAA9eLBUWTAE0jloJTF5dCbOEgaKR+Z3BHl9WBe
|
||||
yMTEDQtxyeKj3YlIFH8k4UqPbdHntzeieSMFUP0CgYEAlz4ikLuPzm/AJ2XG66eI
|
||||
h4xXVYFj/Sqxatyy/+xJlfR8cH+lWcxVV8JlQsyzw8vez1nP84TlA4xMOUrv53wI
|
||||
2AkUX9vrpaC8aNsTPFBPQasVBEO16j0gkE64XEusMuTpd2ZCSPhbP/7SfLV+hYo6
|
||||
Z4TnkRCw67DzzptNpr6QppUCgYA4uO9qaQUFWXPj9ziRQ5Q9lY+POpRXeoLjK7vH
|
||||
Rbt5NXF+okdCvv4K/fi/8sVhZZkyDoLc5Kk3t6NK0rYC0YFo2exYcq+P1wRO7DWS
|
||||
gjbEBXsTJt33VVOhOZj/U3a/CvQ+zC+JqbYeA8BU7Tsw20h+U//YeQ287fSbv55e
|
||||
GGD9vQKBgCk2PE25323gwVKVghTqYcm9/erz66YZN5yg9sCKxBzugJXIgyASMWwT
|
||||
6tfBLbAU+dEhMmNKhac/tOsiqQ3NUXBjVn9Fsc23K9Us7TQBV27AEruaFhG1sRma
|
||||
I3VrYbXdlcmHnfcDt5eklAW1+rgpcEQVnazgmv6Z3MMQe+lK9tdo
|
||||
-----END RSA PRIVATE KEY-----
|
||||
@@ -1,24 +0,0 @@
|
||||
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
/**
|
||||
* List of enabled tasks in the priority order
|
||||
*
|
||||
* The first one has the lowest priority.
|
||||
*
|
||||
* For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
|
||||
* TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
|
||||
* where :
|
||||
* 'n' in the name of the task
|
||||
* 'r' in the main routine of the task
|
||||
* 'd' in an opaque parameter passed to the routine at startup
|
||||
* 's' is the stack size in bytes; must be a multiple of 8
|
||||
*/
|
||||
#define CONFIG_TASK_LIST \
|
||||
TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
|
||||
TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \
|
||||
TASK_NOTEST(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
|
||||
TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \
|
||||
TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE)
|
||||
@@ -1,54 +0,0 @@
|
||||
/* -*- mode:c -*-
|
||||
*
|
||||
* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
/* Declare symbolic names for all the GPIOs that we care about.
|
||||
* Note: Those with interrupt handlers must be declared first. */
|
||||
|
||||
/* Interrupts */
|
||||
GPIO_INT(AC_PRESENT, PIN(C, 13), GPIO_INT_BOTH, vbus_evt) /* AC power present */
|
||||
GPIO_INT(CHARGE_STATUS, PIN(F, 1), GPIO_INT_BOTH, charge_state_interrupt)
|
||||
|
||||
/* PD RX/TX */
|
||||
GPIO(USB_C0_CC1_PD, PIN(A, 1), GPIO_ANALOG)
|
||||
GPIO(USB_C0_CC2_PD, PIN(A, 3), GPIO_ANALOG)
|
||||
GPIO(USB_C0_CC1_TX_DATA, PIN(B, 4), GPIO_INPUT)
|
||||
GPIO(USB_C0_CC2_TX_DATA, PIN(A, 6), GPIO_INPUT)
|
||||
|
||||
#if 0
|
||||
/* Alternate functions */
|
||||
GPIO(USB_C0_TX_CLKOUT, PIN(B, 15), GPIO_OUT_LOW)
|
||||
GPIO(USB_C0_TX_CLKIN, PIN(B, 3), GPIO_OUT_LOW)
|
||||
#endif
|
||||
|
||||
/* Other inputs */
|
||||
GPIO(PPVAR_VBUS_SENSE, PIN(A, 7), GPIO_ANALOG)
|
||||
GPIO(BAT_PRESENT, PIN(A, 14), GPIO_INPUT)
|
||||
GPIO(USB_C0_N, PIN(A, 11), GPIO_INPUT)
|
||||
GPIO(USB_C0_P, PIN(A, 12), GPIO_INPUT)
|
||||
|
||||
/* Other outputs */
|
||||
GPIO(AP_INT_L, PIN(A, 13), GPIO_ODR_HIGH)
|
||||
GPIO(USB_C_CC_EN, PIN(A, 15), GPIO_OUT_HIGH)
|
||||
GPIO(BAT_LED_GREEN, PIN(C, 14), GPIO_ODR_HIGH)
|
||||
GPIO(BAT_LED_RED, PIN(C, 15), GPIO_ODR_HIGH)
|
||||
GPIO(BAT_LED_BLUE, PIN(F, 0), GPIO_ODR_HIGH)
|
||||
|
||||
UNIMPLEMENTED(ENTERING_RW)
|
||||
|
||||
/*
|
||||
* I2C pins should be configured as inputs until I2C module is
|
||||
* initialized. This will avoid driving the lines unintentionally.
|
||||
*/
|
||||
GPIO(SLAVE_I2C_SCL, PIN(B, 6), GPIO_INPUT)
|
||||
GPIO(SLAVE_I2C_SDA, PIN(B, 7), GPIO_INPUT)
|
||||
GPIO(MASTER_I2C_SCL, PIN(B, 10), GPIO_INPUT)
|
||||
GPIO(MASTER_I2C_SDA, PIN(B, 11), GPIO_INPUT)
|
||||
|
||||
ALTERNATE(PIN_MASK(B, 0x0008), 0, MODULE_USB_PD, 0) /* SPI1: SCK(PB3) */
|
||||
ALTERNATE(PIN_MASK(B, 0x8000), 1, MODULE_USB_PD, 0) /* TIM15_CH2: PB15) */
|
||||
ALTERNATE(PIN_MASK(A, 0x0600), 1, MODULE_UART, 0) /* USART1: PA9/PA10 */
|
||||
ALTERNATE(PIN_MASK(B, 0x0cc0), 1, MODULE_I2C, 0) /* I2C SLAVE:PB6/7 MASTER:PB10/11 */
|
||||
@@ -1,196 +0,0 @@
|
||||
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*
|
||||
* Power and battery LED control for Lucid.
|
||||
*/
|
||||
|
||||
#include "battery.h"
|
||||
#include "charge_state.h"
|
||||
#include "chipset.h"
|
||||
#include "ec_commands.h"
|
||||
#include "gpio.h"
|
||||
#include "hooks.h"
|
||||
#include "host_command.h"
|
||||
#include "led_common.h"
|
||||
#include "util.h"
|
||||
|
||||
#define BAT_LED_ON 0
|
||||
#define BAT_LED_OFF 1
|
||||
|
||||
#define CRITICAL_LOW_BATTERY_PERCENTAGE 5
|
||||
#define LOW_BATTERY_PERCENTAGE 20
|
||||
#define HIGH_BATTERY_PERCENTAGE 97
|
||||
|
||||
#define LED_TOTAL_2SECS_TICKS 2
|
||||
#define LED_ON_1SEC_TICKS 1
|
||||
#define LED_ON_2SECS_TICKS 2
|
||||
|
||||
const enum ec_led_id supported_led_ids[] = {
|
||||
EC_LED_ID_BATTERY_LED};
|
||||
|
||||
const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids);
|
||||
|
||||
static int led_enabled, battery_ticks;
|
||||
|
||||
enum led_color {
|
||||
LED_OFF = 0,
|
||||
LED_RED,
|
||||
LED_AMBER,
|
||||
LED_GREEN,
|
||||
LED_BLUE,
|
||||
LED_COLOR_COUNT /* Number of colors, not a color itself */
|
||||
};
|
||||
|
||||
static int bat_led_set_color(enum led_color color)
|
||||
{
|
||||
switch (color) {
|
||||
case LED_OFF:
|
||||
gpio_set_level(GPIO_BAT_LED_RED, BAT_LED_OFF);
|
||||
gpio_set_level(GPIO_BAT_LED_GREEN, BAT_LED_OFF);
|
||||
gpio_set_level(GPIO_BAT_LED_BLUE, BAT_LED_OFF);
|
||||
break;
|
||||
case LED_RED:
|
||||
gpio_set_level(GPIO_BAT_LED_RED, BAT_LED_ON);
|
||||
gpio_set_level(GPIO_BAT_LED_GREEN, BAT_LED_OFF);
|
||||
gpio_set_level(GPIO_BAT_LED_BLUE, BAT_LED_OFF);
|
||||
break;
|
||||
case LED_AMBER:
|
||||
gpio_set_level(GPIO_BAT_LED_RED, BAT_LED_ON);
|
||||
gpio_set_level(GPIO_BAT_LED_GREEN, BAT_LED_ON);
|
||||
gpio_set_level(GPIO_BAT_LED_BLUE, BAT_LED_OFF);
|
||||
break;
|
||||
case LED_GREEN:
|
||||
gpio_set_level(GPIO_BAT_LED_RED, BAT_LED_OFF);
|
||||
gpio_set_level(GPIO_BAT_LED_GREEN, BAT_LED_ON);
|
||||
gpio_set_level(GPIO_BAT_LED_BLUE, BAT_LED_OFF);
|
||||
break;
|
||||
case LED_BLUE:
|
||||
gpio_set_level(GPIO_BAT_LED_RED, BAT_LED_OFF);
|
||||
gpio_set_level(GPIO_BAT_LED_GREEN, BAT_LED_OFF);
|
||||
gpio_set_level(GPIO_BAT_LED_BLUE, BAT_LED_ON);
|
||||
break;
|
||||
default:
|
||||
return EC_ERROR_UNKNOWN;
|
||||
}
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
||||
void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range)
|
||||
{
|
||||
brightness_range[EC_LED_COLOR_RED] = 1;
|
||||
brightness_range[EC_LED_COLOR_GREEN] = 1;
|
||||
brightness_range[EC_LED_COLOR_BLUE] = 1;
|
||||
}
|
||||
|
||||
static int lucid_led_set_color_battery(enum led_color color)
|
||||
{
|
||||
return bat_led_set_color(color);
|
||||
}
|
||||
|
||||
static int lucid_led_set_color(enum ec_led_id led_id, enum led_color color)
|
||||
{
|
||||
int rv;
|
||||
|
||||
led_auto_control(led_id, 0);
|
||||
switch (led_id) {
|
||||
case EC_LED_ID_BATTERY_LED:
|
||||
rv = lucid_led_set_color_battery(color);
|
||||
break;
|
||||
default:
|
||||
return EC_ERROR_UNKNOWN;
|
||||
}
|
||||
return rv;
|
||||
}
|
||||
|
||||
int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness)
|
||||
{
|
||||
if (brightness[EC_LED_COLOR_RED] != 0 &&
|
||||
brightness[EC_LED_COLOR_GREEN] != 0)
|
||||
lucid_led_set_color(led_id, LED_AMBER);
|
||||
else if (brightness[EC_LED_COLOR_RED] != 0)
|
||||
lucid_led_set_color(led_id, LED_RED);
|
||||
else if (brightness[EC_LED_COLOR_GREEN] != 0)
|
||||
lucid_led_set_color(led_id, LED_GREEN);
|
||||
else if (brightness[EC_LED_COLOR_BLUE] != 0)
|
||||
lucid_led_set_color(led_id, LED_BLUE);
|
||||
else
|
||||
lucid_led_set_color(led_id, LED_OFF);
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
||||
static void lucid_update_charge_display(void)
|
||||
{
|
||||
uint32_t chflags = charge_get_flags();
|
||||
int charge_percent;
|
||||
|
||||
/* BAT LED behavior:
|
||||
* Fully charged: Green
|
||||
* Force Idle (for factory): 2 secs of Blue 2 secs of Amber
|
||||
* Battery low (20%): Red
|
||||
* Battery critical low (5%): Red blink 1 second every 2 seconds
|
||||
* Using battery or not connected to AC power: OFF
|
||||
*/
|
||||
switch (charge_get_state()) {
|
||||
case PWR_STATE_CHARGE:
|
||||
lucid_led_set_color_battery(
|
||||
(battery_ticks % LED_TOTAL_2SECS_TICKS <
|
||||
LED_ON_1SEC_TICKS) ? LED_AMBER : LED_OFF);
|
||||
break;
|
||||
case PWR_STATE_DISCHARGE:
|
||||
charge_percent = charge_get_percent();
|
||||
if (charge_percent < CRITICAL_LOW_BATTERY_PERCENTAGE)
|
||||
/* Blink once every two seconds */
|
||||
lucid_led_set_color_battery(
|
||||
(battery_ticks % LED_TOTAL_2SECS_TICKS <
|
||||
LED_ON_1SEC_TICKS) ? LED_RED : LED_OFF);
|
||||
else if (!led_enabled)
|
||||
lucid_led_set_color_battery(LED_OFF);
|
||||
else if (charge_percent < LOW_BATTERY_PERCENTAGE)
|
||||
lucid_led_set_color_battery(LED_RED);
|
||||
else if (charge_percent < HIGH_BATTERY_PERCENTAGE)
|
||||
lucid_led_set_color_battery(LED_AMBER);
|
||||
else
|
||||
lucid_led_set_color_battery(LED_GREEN);
|
||||
break;
|
||||
case PWR_STATE_ERROR:
|
||||
lucid_led_set_color_battery(
|
||||
(battery_ticks % LED_TOTAL_2SECS_TICKS <
|
||||
LED_ON_1SEC_TICKS) ? LED_RED : LED_OFF);
|
||||
break;
|
||||
case PWR_STATE_CHARGE_NEAR_FULL:
|
||||
lucid_led_set_color_battery(LED_GREEN);
|
||||
break;
|
||||
case PWR_STATE_IDLE: /* External power connected in IDLE. */
|
||||
if (chflags & CHARGE_FLAG_FORCE_IDLE)
|
||||
lucid_led_set_color_battery(
|
||||
(battery_ticks % LED_TOTAL_2SECS_TICKS <
|
||||
LED_ON_1SEC_TICKS) ? LED_BLUE : LED_AMBER);
|
||||
else
|
||||
lucid_led_set_color_battery(LED_BLUE);
|
||||
break;
|
||||
default:
|
||||
/* Other states don't alter LED behavior */
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void lucid_led_set_battery(void)
|
||||
{
|
||||
battery_ticks++;
|
||||
lucid_update_charge_display();
|
||||
}
|
||||
|
||||
/** * Called by hook task every 1 sec */
|
||||
static void led_second(void)
|
||||
{
|
||||
if (led_auto_control_is_enabled(EC_LED_ID_BATTERY_LED))
|
||||
lucid_led_set_battery();
|
||||
}
|
||||
DECLARE_HOOK(HOOK_SECOND, led_second, HOOK_PRIO_DEFAULT);
|
||||
|
||||
void led_enable(int enable)
|
||||
{
|
||||
led_enabled = enable;
|
||||
lucid_update_charge_display();
|
||||
}
|
||||
@@ -1,162 +0,0 @@
|
||||
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
#include "adc.h"
|
||||
#include "gpio.h"
|
||||
#include "registers.h"
|
||||
|
||||
/* USB Power delivery board configuration */
|
||||
|
||||
#ifndef __CROS_EC_USB_PD_CONFIG_H
|
||||
#define __CROS_EC_USB_PD_CONFIG_H
|
||||
|
||||
/* Timer selection for baseband PD communication */
|
||||
#define TIM_CLOCK_PD_TX_C0 15
|
||||
#define TIM_CLOCK_PD_RX_C0 1
|
||||
|
||||
#define TIM_CLOCK_PD_TX(p) TIM_CLOCK_PD_TX_C0
|
||||
#define TIM_CLOCK_PD_RX(p) TIM_CLOCK_PD_RX_C0
|
||||
|
||||
/* Timer channel */
|
||||
#define TIM_RX_CCR_C0 1
|
||||
#define TIM_TX_CCR_C0 2
|
||||
|
||||
/* RX timer capture/compare register */
|
||||
#define TIM_CCR_C0 (&STM32_TIM_CCRx(TIM_CLOCK_PD_RX_C0, TIM_RX_CCR_C0))
|
||||
#define TIM_RX_CCR_REG(p) TIM_CCR_C0
|
||||
|
||||
/* TX and RX timer register */
|
||||
#define TIM_REG_TX_C0 (STM32_TIM_BASE(TIM_CLOCK_PD_TX_C0))
|
||||
#define TIM_REG_RX_C0 (STM32_TIM_BASE(TIM_CLOCK_PD_RX_C0))
|
||||
#define TIM_REG_TX(p) TIM_REG_TX_C0
|
||||
#define TIM_REG_RX(p) TIM_REG_RX_C0
|
||||
|
||||
/* use the hardware accelerator for CRC */
|
||||
#define CONFIG_HW_CRC
|
||||
|
||||
/* TX uses SPI1 on PB3-4 */
|
||||
#define SPI_REGS(p) STM32_SPI1_REGS
|
||||
static inline void spi_enable_clock(int port)
|
||||
{
|
||||
STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI1;
|
||||
}
|
||||
|
||||
/* DMA for transmit uses DMA_CH3 */
|
||||
#define DMAC_SPI_TX(p) STM32_DMAC_CH3
|
||||
|
||||
/* RX uses COMP1 and COMP2 on TIM1 CH1 */
|
||||
#define CMP1OUTSEL STM32_COMP_CMP1OUTSEL_TIM1_IC1
|
||||
#define CMP2OUTSEL STM32_COMP_CMP2OUTSEL_TIM1_IC1
|
||||
|
||||
#define TIM_TX_CCR_IDX(p) TIM_TX_CCR_C0
|
||||
#define TIM_RX_CCR_IDX(p) TIM_RX_CCR_C0
|
||||
#define TIM_CCR_CS 1
|
||||
#define EXTI_COMP_MASK(p) ((1 << 21) | (1 << 22))
|
||||
#define IRQ_COMP STM32_IRQ_COMP
|
||||
/* triggers packet detection on comparator falling edge */
|
||||
#define EXTI_XTSR STM32_EXTI_FTSR
|
||||
|
||||
/* DMA for receive uses DMA_CH2 */
|
||||
#define DMAC_TIM_RX(p) STM32_DMAC_CH2
|
||||
|
||||
/* the pins used for communication need to be hi-speed */
|
||||
static inline void pd_set_pins_speed(int port)
|
||||
{
|
||||
/* 40 MHz pin speed on SPI PB3/4/15 */
|
||||
STM32_GPIO_OSPEEDR(GPIO_B) |= 0xC00003C0;
|
||||
/* 40 MHz pin speed on SPI PA6 */
|
||||
STM32_GPIO_OSPEEDR(GPIO_A) |= 0x00003000;
|
||||
}
|
||||
|
||||
/* Reset SPI peripheral used for TX */
|
||||
static inline void pd_tx_spi_reset(int port)
|
||||
{
|
||||
/* Reset SPI1 */
|
||||
STM32_RCC_APB2RSTR |= (1 << 12);
|
||||
STM32_RCC_APB2RSTR &= ~(1 << 12);
|
||||
}
|
||||
|
||||
/* Drive the CC line from the TX block */
|
||||
static inline void pd_tx_enable(int port, int polarity)
|
||||
{
|
||||
/* put SPI function on TX pin */
|
||||
if (polarity) {
|
||||
/* USB_C0_CC2_TX_DATA: PA6 is SPI1 MISO */
|
||||
gpio_set_alternate_function(GPIO_A, 0x0040, 0);
|
||||
/* MCU ADC PA3 pin output low */
|
||||
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
|
||||
& ~(3 << (2*3))) /* PA3 disable ADC */
|
||||
| (1 << (2*3)); /* Set as GPO */
|
||||
gpio_set_level(GPIO_USB_C0_CC2_PD, 0);
|
||||
} else {
|
||||
/* USB_C0_CC1_TX_DATA: PB4 is SPI1 MISO */
|
||||
gpio_set_alternate_function(GPIO_B, 0x0010, 0);
|
||||
/* MCU ADC PA1 pin output low */
|
||||
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
|
||||
& ~(3 << (2*1))) /* PA1 disable ADC */
|
||||
| (1 << (2*1)); /* Set as GPO */
|
||||
gpio_set_level(GPIO_USB_C0_CC1_PD, 0);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/* Put the TX driver in Hi-Z state */
|
||||
static inline void pd_tx_disable(int port, int polarity)
|
||||
{
|
||||
if (polarity) {
|
||||
/* Set TX_DATA to Hi-Z, PA6 is SPI1 MISO */
|
||||
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
|
||||
& ~(3 << (2*6)));
|
||||
/* set ADC PA3 pin to ADC function (Hi-Z) */
|
||||
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
|
||||
| (3 << (2*3))); /* PA3 as ADC */
|
||||
} else {
|
||||
/* Set TX_DATA to Hi-Z, PB4 is SPI1 MISO */
|
||||
STM32_GPIO_MODER(GPIO_B) = (STM32_GPIO_MODER(GPIO_B)
|
||||
& ~(3 << (2*4)));
|
||||
/* set ADC PA1 pin to ADC function (Hi-Z) */
|
||||
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
|
||||
| (3 << (2*1))); /* PA1 as ADC */
|
||||
}
|
||||
}
|
||||
|
||||
/* we know the plug polarity, do the right configuration */
|
||||
static inline void pd_select_polarity(int port, int polarity)
|
||||
{
|
||||
/*
|
||||
* use the right comparator : CC1 -> PA1 (COMP1 INP)
|
||||
* CC2 -> PA3 (COMP2 INP)
|
||||
* use VrefInt / 2 as INM (about 600mV)
|
||||
*/
|
||||
STM32_COMP_CSR = (STM32_COMP_CSR
|
||||
& ~(STM32_COMP_CMP1INSEL_MASK | STM32_COMP_CMP2INSEL_MASK
|
||||
| STM32_COMP_CMP1EN | STM32_COMP_CMP2EN))
|
||||
| STM32_COMP_CMP1INSEL_VREF12 | STM32_COMP_CMP2INSEL_VREF12
|
||||
| (polarity ? STM32_COMP_CMP2EN : STM32_COMP_CMP1EN);
|
||||
}
|
||||
|
||||
/* Initialize pins used for TX and put them in Hi-Z */
|
||||
static inline void pd_tx_init(void)
|
||||
{
|
||||
gpio_config_module(MODULE_USB_PD, 1);
|
||||
}
|
||||
|
||||
static inline void pd_set_host_mode(int port, int enable)
|
||||
{
|
||||
/* We're always a pull-down, nothing to do here */
|
||||
}
|
||||
|
||||
static inline void pd_config_init(int port, uint8_t power_role)
|
||||
{
|
||||
/* Initialize TX pins and put them in Hi-Z */
|
||||
pd_tx_init();
|
||||
}
|
||||
|
||||
static inline int pd_adc_read(int port, int cc)
|
||||
{
|
||||
return adc_read_channel(cc ? ADC_C0_CC2_PD : ADC_C0_CC1_PD);
|
||||
}
|
||||
|
||||
#endif /* __CROS_EC_USB_PD_CONFIG_H */
|
||||
@@ -1,207 +0,0 @@
|
||||
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
#include "charge_manager.h"
|
||||
#include "common.h"
|
||||
#include "console.h"
|
||||
#include "gpio.h"
|
||||
#include "hooks.h"
|
||||
#include "registers.h"
|
||||
#include "system.h"
|
||||
#include "task.h"
|
||||
#include "timer.h"
|
||||
#include "util.h"
|
||||
#include "usb_pd.h"
|
||||
|
||||
#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
|
||||
#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
|
||||
|
||||
#define PDO_FIXED_FLAGS PDO_FIXED_DATA_SWAP
|
||||
|
||||
/* Source PDOs */
|
||||
const uint32_t pd_src_pdo[] = {};
|
||||
const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo);
|
||||
|
||||
const uint32_t pd_snk_pdo[] = {
|
||||
PDO_FIXED(5000, 500, PDO_FIXED_FLAGS),
|
||||
PDO_BATT(4750, 21000, 15000),
|
||||
PDO_VAR(4750, 21000, 3000),
|
||||
};
|
||||
const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo);
|
||||
|
||||
int pd_is_valid_input_voltage(int mv)
|
||||
{
|
||||
/* Any voltage less than the max is allowed */
|
||||
return 1;
|
||||
}
|
||||
|
||||
void pd_transition_voltage(int idx)
|
||||
{
|
||||
/* No operation: sink only */
|
||||
}
|
||||
|
||||
int pd_set_power_supply_ready(int port)
|
||||
{
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
||||
void pd_power_supply_reset(int port)
|
||||
{
|
||||
}
|
||||
|
||||
void pd_set_input_current_limit(int port, uint32_t max_ma,
|
||||
uint32_t supply_voltage)
|
||||
{
|
||||
struct charge_port_info charge;
|
||||
charge.current = max_ma;
|
||||
charge.voltage = supply_voltage;
|
||||
charge_manager_update_charge(CHARGE_SUPPLIER_PD, port, &charge);
|
||||
}
|
||||
|
||||
void typec_set_input_current_limit(int port, uint32_t max_ma,
|
||||
uint32_t supply_voltage)
|
||||
{
|
||||
struct charge_port_info charge;
|
||||
charge.current = max_ma;
|
||||
charge.voltage = supply_voltage;
|
||||
charge_manager_update_charge(CHARGE_SUPPLIER_TYPEC, port, &charge);
|
||||
}
|
||||
|
||||
int pd_snk_is_vbus_provided(int port)
|
||||
{
|
||||
return gpio_get_level(GPIO_AC_PRESENT);
|
||||
}
|
||||
|
||||
int pd_board_checks(void)
|
||||
{
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
||||
int pd_check_power_swap(int port)
|
||||
{
|
||||
/* Always refuse power swap */
|
||||
return 0;
|
||||
}
|
||||
|
||||
int pd_check_data_swap(int port, int data_role)
|
||||
{
|
||||
/* Allow data swap if we are a UFP, otherwise don't allow */
|
||||
return (data_role == PD_ROLE_UFP) ? 1 : 0;
|
||||
}
|
||||
|
||||
void pd_execute_data_swap(int port, int data_role)
|
||||
{
|
||||
/* Do nothing */
|
||||
}
|
||||
|
||||
void pd_check_pr_role(int port, int pr_role, int flags)
|
||||
{
|
||||
}
|
||||
|
||||
void pd_check_dr_role(int port, int dr_role, int flags)
|
||||
{
|
||||
/* If UFP, try to switch to DFP */
|
||||
if ((flags & PD_FLAGS_PARTNER_DR_DATA) && dr_role == PD_ROLE_UFP)
|
||||
pd_request_data_swap(port);
|
||||
}
|
||||
/* ----------------- Vendor Defined Messages ------------------ */
|
||||
const struct svdm_response svdm_rsp = {
|
||||
.identity = NULL,
|
||||
.svids = NULL,
|
||||
.modes = NULL,
|
||||
};
|
||||
|
||||
int pd_custom_vdm(int port, int cnt, uint32_t *payload,
|
||||
uint32_t **rpayload)
|
||||
{
|
||||
int cmd = PD_VDO_CMD(payload[0]);
|
||||
uint16_t dev_id = 0;
|
||||
int is_rw;
|
||||
|
||||
/* make sure we have some payload */
|
||||
if (cnt == 0)
|
||||
return 0;
|
||||
|
||||
switch (cmd) {
|
||||
case VDO_CMD_VERSION:
|
||||
/* guarantee last byte of payload is null character */
|
||||
*(payload + cnt - 1) = 0;
|
||||
CPRINTF("version: %s\n", (char *)(payload+1));
|
||||
break;
|
||||
case VDO_CMD_READ_INFO:
|
||||
case VDO_CMD_SEND_INFO:
|
||||
/* copy hash */
|
||||
if (cnt == 7) {
|
||||
dev_id = VDO_INFO_HW_DEV_ID(payload[6]);
|
||||
is_rw = VDO_INFO_IS_RW(payload[6]);
|
||||
pd_dev_store_rw_hash(port,
|
||||
dev_id,
|
||||
payload + 1,
|
||||
is_rw ?
|
||||
SYSTEM_IMAGE_RW :
|
||||
SYSTEM_IMAGE_RO);
|
||||
|
||||
CPRINTF("DevId:%d.%d SW:%d RW:%d\n",
|
||||
HW_DEV_ID_MAJ(dev_id),
|
||||
HW_DEV_ID_MIN(dev_id),
|
||||
VDO_INFO_SW_DBG_VER(payload[6]),
|
||||
is_rw);
|
||||
} else if (cnt == 6) {
|
||||
/* really old devices don't have last byte */
|
||||
pd_dev_store_rw_hash(port, dev_id, payload + 1,
|
||||
SYSTEM_IMAGE_UNKNOWN);
|
||||
}
|
||||
break;
|
||||
case VDO_CMD_CURRENT:
|
||||
CPRINTF("Current: %dmA\n", payload[1]);
|
||||
break;
|
||||
case VDO_CMD_GET_LOG:
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int svdm_enter_gfu_mode(int port, uint32_t mode_caps)
|
||||
{
|
||||
/* Always enter GFU mode */
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void svdm_exit_gfu_mode(int port)
|
||||
{
|
||||
}
|
||||
|
||||
static int svdm_gfu_status(int port, uint32_t *payload)
|
||||
{
|
||||
/*
|
||||
* This is called after enter mode is successful, send unstructured
|
||||
* VDM to read info.
|
||||
*/
|
||||
pd_send_vdm(port, USB_VID_GOOGLE, VDO_CMD_READ_INFO, NULL, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int svdm_gfu_config(int port, uint32_t *payload)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int svdm_gfu_attention(int port, uint32_t *payload)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
const struct svdm_amode_fx supported_modes[] = {
|
||||
{
|
||||
.svid = USB_VID_GOOGLE,
|
||||
.enter = &svdm_enter_gfu_mode,
|
||||
.status = &svdm_gfu_status,
|
||||
.config = &svdm_gfu_config,
|
||||
.attention = &svdm_gfu_attention,
|
||||
.exit = &svdm_exit_gfu_mode,
|
||||
}
|
||||
};
|
||||
const int supported_modes_cnt = ARRAY_SIZE(supported_modes);
|
||||
@@ -1,63 +0,0 @@
|
||||
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
/* Snoball board configuration */
|
||||
|
||||
#include "adc.h"
|
||||
#include "adc_chip.h"
|
||||
#include "common.h"
|
||||
#include "console.h"
|
||||
#include "gpio.h"
|
||||
#include "hooks.h"
|
||||
#include "host_command.h"
|
||||
#include "i2c.h"
|
||||
#include "registers.h"
|
||||
#include "task.h"
|
||||
#include "util.h"
|
||||
|
||||
void tcpc_alert_event(enum gpio_signal signal)
|
||||
{
|
||||
/* Exchange status with TCPCs */
|
||||
ccprintf("TCPC alert!\n");
|
||||
}
|
||||
|
||||
#include "gpio_list.h"
|
||||
|
||||
const struct i2c_port_t i2c_ports[] = {
|
||||
{"tcpc-a", STM32_I2C1_PORT, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA},
|
||||
{"tcpc-b", STM32_I2C2_PORT, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA},
|
||||
};
|
||||
const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
|
||||
|
||||
/* ADC channels */
|
||||
const struct adc_t adc_channels[] = {
|
||||
/* VBIAS input voltage, through /2 divider. */
|
||||
[ADC_VBIAS] = {"VBIAS", 6600, 4096, 0, STM32_AIN(4)},
|
||||
[ADC_VOUT_1] = {"VOUT_1", 39600, 4096, 0, STM32_AIN(5)},
|
||||
[ADC_VOUT_2] = {"VOUT_2", 39600, 4096, 0, STM32_AIN(6)},
|
||||
};
|
||||
BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
|
||||
|
||||
|
||||
static void board_init(void)
|
||||
{
|
||||
gpio_enable_interrupt(GPIO_TCPC1_INT);
|
||||
gpio_enable_interrupt(GPIO_TCPC2_INT);
|
||||
}
|
||||
DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
|
||||
|
||||
void board_config_pre_init(void)
|
||||
{
|
||||
/* enable SYSCFG clock */
|
||||
STM32_RCC_APB2ENR |= 1 << 0;
|
||||
/*
|
||||
* the DMA mapping is :
|
||||
* Chan 4 : USART1_TX
|
||||
* Chan 5 : USART1_RX
|
||||
*/
|
||||
|
||||
/* Remap USART1 RX/TX DMA to match uart driver. */
|
||||
STM32_SYSCFG_CFGR1 |= (1 << 9) | (1 << 10);
|
||||
}
|
||||
@@ -1,77 +0,0 @@
|
||||
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
/* Snoball board configuration */
|
||||
|
||||
#ifndef __CROS_EC_BOARD_H
|
||||
#define __CROS_EC_BOARD_H
|
||||
|
||||
/* the UART console is on USART1 (PA9/PA10) */
|
||||
#define CONFIG_UART_CONSOLE 1
|
||||
|
||||
/*
|
||||
* The console task is too big to include in both RO and RW images. Therefore,
|
||||
* if the console task is defined, then only build an RW image. This can be
|
||||
* useful for debugging to have a full console. Otherwise, without this task,
|
||||
* a full RO and RW is built with a limited one-way output console.
|
||||
*/
|
||||
#ifdef HAS_TASK_CONSOLE
|
||||
#undef CONFIG_FW_INCLUDE_RO
|
||||
#undef CONFIG_RW_MEM_OFF
|
||||
#define CONFIG_RW_MEM_OFF 0
|
||||
#undef CONFIG_RO_SIZE
|
||||
#define CONFIG_RO_SIZE 0
|
||||
/* Fake full size if we had a RO partition */
|
||||
#undef CONFIG_RW_SIZE
|
||||
#define CONFIG_RW_SIZE CONFIG_FLASH_SIZE
|
||||
|
||||
#else
|
||||
#define CONFIG_DEBUG_PRINTF
|
||||
#define UARTN CONFIG_UART_CONSOLE
|
||||
#define UARTN_BASE STM32_USART_BASE(CONFIG_UART_CONSOLE)
|
||||
#endif
|
||||
|
||||
/* 48 MHz SYSCLK clock frequency */
|
||||
#define CPU_CLOCK 48000000
|
||||
|
||||
#define CONFIG_ADC
|
||||
#undef CONFIG_ADC_WATCHDOG
|
||||
#define CONFIG_BOARD_PRE_INIT
|
||||
#define CONFIG_HW_CRC
|
||||
#define CONFIG_I2C
|
||||
#define CONFIG_I2C_MASTER
|
||||
#undef CONFIG_LID_SWITCH
|
||||
#undef CONFIG_WATCHDOG_HELP
|
||||
|
||||
#define CONFIG_LTO
|
||||
|
||||
#define CONFIG_HIBERNATE
|
||||
|
||||
/*
|
||||
* Allow dangerous commands all the time, since we don't have a write protect
|
||||
* switch.
|
||||
*/
|
||||
#define CONFIG_SYSTEM_UNLOCKED
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
|
||||
/* Timer selection */
|
||||
#define TIM_CLOCK_MSB 3
|
||||
#define TIM_CLOCK_LSB 1
|
||||
|
||||
#include "gpio_signal.h"
|
||||
|
||||
/* ADC signals */
|
||||
enum adc_channel {
|
||||
ADC_VBIAS,
|
||||
ADC_VOUT_1,
|
||||
ADC_VOUT_2,
|
||||
/* Number of ADC channels */
|
||||
ADC_CH_COUNT
|
||||
};
|
||||
|
||||
#endif /* !__ASSEMBLER__ */
|
||||
|
||||
#endif /* __CROS_EC_BOARD_H */
|
||||
@@ -1,16 +0,0 @@
|
||||
# -*- makefile -*-
|
||||
# Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
# Use of this source code is governed by a BSD-style license that can be
|
||||
# found in the LICENSE file.
|
||||
#
|
||||
# Board specific files build
|
||||
|
||||
# the IC is STmicro STM32F030C8
|
||||
CHIP:=stm32
|
||||
CHIP_FAMILY:=stm32f0
|
||||
CHIP_VARIANT:=stm32f03x8
|
||||
|
||||
board-y=board.o
|
||||
|
||||
# This target builds RW only. Therefore, remove RO from dependencies.
|
||||
all_deps=$(patsubst ro,,$(def_all_deps))
|
||||
@@ -1,21 +0,0 @@
|
||||
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
/**
|
||||
* List of enabled tasks in the priority order
|
||||
*
|
||||
* The first one has the lowest priority.
|
||||
*
|
||||
* For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
|
||||
* TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
|
||||
* where :
|
||||
* 'n' in the name of the task
|
||||
* 'r' in the main routine of the task
|
||||
* 'd' in an opaque parameter passed to the routine at startup
|
||||
* 's' is the stack size in bytes; must be a multiple of 8
|
||||
*/
|
||||
#define CONFIG_TASK_LIST \
|
||||
TASK_ALWAYS(HOOKS, hook_task, NULL, TASK_STACK_SIZE) \
|
||||
TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE)
|
||||
@@ -1,47 +0,0 @@
|
||||
/* -*- mode:c -*-
|
||||
*
|
||||
* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
/* Declare symbolic names for all the GPIOs that we care about.
|
||||
* Note: Those with interrupt handlers must be declared first. */
|
||||
|
||||
/* TCPC alert / interrupt inputs */
|
||||
GPIO_INT(TCPC1_INT, PIN(A, 0), GPIO_INT_FALLING | GPIO_PULL_UP, tcpc_alert_event)
|
||||
GPIO_INT(TCPC2_INT, PIN(F, 7), GPIO_INT_FALLING | GPIO_PULL_UP, tcpc_alert_event)
|
||||
|
||||
GPIO(OPTO_TX_1, PIN(A, 2), GPIO_OUT_LOW)
|
||||
GPIO(OPTO_TX_2, PIN(A, 3), GPIO_OUT_LOW)
|
||||
|
||||
/* ADCs */
|
||||
GPIO(VBIAS, PIN(A, 4), GPIO_ANALOG)
|
||||
GPIO(VOUT_1, PIN(A, 5), GPIO_ANALOG)
|
||||
GPIO(VOUT_2, PIN(A, 6), GPIO_ANALOG)
|
||||
|
||||
/*
|
||||
* I2C pins should be configured as inputs until I2C module is
|
||||
* initialized. This will avoid driving the lines unintentionally.
|
||||
*/
|
||||
GPIO(I2C1_SCL, PIN(B, 6), GPIO_INPUT | GPIO_PULL_UP)
|
||||
GPIO(I2C1_SDA, PIN(B, 7), GPIO_INPUT | GPIO_PULL_UP)
|
||||
GPIO(I2C2_SCL, PIN(A, 11), GPIO_INPUT | GPIO_PULL_UP) /* bitbang */
|
||||
GPIO(I2C2_SDA, PIN(A, 12), GPIO_INPUT | GPIO_PULL_UP) /* bitbang */
|
||||
|
||||
/* Unimplemented signals which we need to emulate for now */
|
||||
UNIMPLEMENTED(ENTERING_RW)
|
||||
UNIMPLEMENTED(WP_L)
|
||||
|
||||
/* Alternate functions */
|
||||
#if 0
|
||||
/* UART pins */
|
||||
GPIO(EC_UART_TX, PIN(A, 9), GPIO_OUT_LOW)
|
||||
GPIO(EC_UART_RX, PIN(A, 10), GPIO_INPUT)
|
||||
#endif
|
||||
|
||||
/* PB6 / PB7 I2C1_SCL / I2C1_SDA */
|
||||
ALTERNATE(PIN_MASK(B, 0x00C0), 1, MODULE_I2C, GPIO_PULL_UP)
|
||||
|
||||
/* PA2 / PA9 / PA10: USART1 */
|
||||
ALTERNATE(PIN_MASK(A, 0x0600), 1, MODULE_UART, 0)
|
||||
@@ -190,13 +190,6 @@ int charger_post_init(void)
|
||||
return rv;
|
||||
|
||||
option &= ~OPTION0_LEARN_ENABLE;
|
||||
|
||||
#ifdef BOARD_LUCID
|
||||
/* Use 600kHz switching frequency */
|
||||
option &= ~OPTION0_SWITCHING_FREQ_MASK;
|
||||
option |= OPTION0_SWITCHING_FREQ_600KHZ;
|
||||
#endif
|
||||
|
||||
rv = charger_set_option(option);
|
||||
if (rv)
|
||||
return rv;
|
||||
|
||||
@@ -66,7 +66,6 @@ BOARDS_STM32=(
|
||||
jerry
|
||||
kitty
|
||||
llama
|
||||
lucid
|
||||
minimuffin
|
||||
oak
|
||||
oak_pd
|
||||
@@ -74,7 +73,6 @@ BOARDS_STM32=(
|
||||
plankton
|
||||
samus_pd
|
||||
scarlet
|
||||
snoball
|
||||
staff
|
||||
strago_pd
|
||||
zinger
|
||||
|
||||
Reference in New Issue
Block a user