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PMIC_PWROK is active-high on pit

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Add a function which handles translation of PWROK from logical level
to physical level.

Also implement chipset_force_shutdown() in gaia_power.c, so PMU code
doesn't need to know about PWROK physical level.

BUG=chrome-os-partner:18738
BRANCH=none
TEST=build all platforms; boot spring

Change-Id: I360266ef89b6ead49a633cd57b7530f791b04c9e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48251
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This commit is contained in:
Randall Spangler
2013-04-16 13:06:36 -07:00
committed by ChromeBot
parent caad1bdbd4
commit 5f18b03e1b
5 changed files with 38 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
board/pit/board.c
View File

@@ -64,7 +64,7 @@ const struct gpio_info gpio_list[GPIO_COUNT] = {
{"I2C2_SCL", GPIO_B, (1<<10), GPIO_INPUT, NULL},
{"I2C2_SDA", GPIO_B, (1<<11), GPIO_INPUT, NULL},
{"LED_POWER_L", GPIO_A, (1<<2), GPIO_OUT_HIGH, NULL},
{"PMIC_PWRON_L",GPIO_A, (1<<12), GPIO_OUT_HIGH, NULL},
{"PMIC_PWRON", GPIO_A, (1<<12), GPIO_OUT_LOW, NULL},
{"PMIC_RESET", GPIO_A, (1<<15), GPIO_OUT_LOW, NULL},
#ifndef CONFIG_SPI
{"SPI1_MISO", GPIO_A, (1<<6), GPIO_OUT_HIGH, NULL},

2
board/pit/board.h
View File

@@ -98,7 +98,7 @@ enum gpio_signal {
GPIO_I2C2_SCL,
GPIO_I2C2_SDA,
GPIO_LED_POWER_L,
GPIO_PMIC_PWRON_L,
GPIO_PMIC_PWRON,
GPIO_PMIC_RESET,
#ifndef CONFIG_SPI
GPIO_SPI1_MISO,

46
common/gaia_power.c
View File

@@ -72,7 +72,7 @@
#define DELAY_SHUTDOWN_ON_POWER_HOLD (8 * SECOND)
#define DELAY_SHUTDOWN_ON_USB_BOOT (16 * SECOND)
/* Maximum delay after power button press before we release GPIO_PMIC_PWRON_L */
/* Maximum delay after power button press before we deassert GPIO_PMIC_PWRON */
#define DELAY_RELEASE_PWRON SECOND /* 1s */
/* debounce time to prevent accidental power-on after keyboard power off */
@@ -118,7 +118,7 @@ enum power_request_t {
static enum power_request_t power_request;
/*
/**
* Wait for GPIO "signal" to reach level "value".
* Returns EC_ERROR_TIMEOUT if timeout before reaching the desired state.
*
@@ -152,7 +152,25 @@ static int wait_in_signal(enum gpio_signal signal, int value, int timeout)
return EC_SUCCESS;
}
/*
/**
* Set the PMIC PWROK signal.
*
* @param asserted Assert (=1) or deassert (=0) the signal. This is the
* logical level of the pin, not the physical level.
*/
static void set_pmic_pwrok(int asserted)
{
#ifdef BOARD_pit
/* Signal is active-high */
gpio_set_level(GPIO_PMIC_PWRON, asserted);
#else
/* Signal is active-low */
gpio_set_level(GPIO_PMIC_PWRON_L, asserted ? 0 : 1);
#endif
}
/**
* Check for some event triggering the shutdown.
*
* It can be either a long power button press or a shutdown triggered from the
@@ -181,7 +199,7 @@ static int check_for_power_off_event(void)
now = get_time();
if (pressed) {
gpio_set_level(GPIO_PMIC_PWRON_L, 0);
set_pmic_pwrok(1);
if (!power_button_was_pressed) {
power_off_deadline.val = now.val + DELAY_FORCE_SHUTDOWN;
@@ -195,7 +213,7 @@ static int check_for_power_off_event(void)
}
} else if (power_button_was_pressed) {
CPUTS("Cancel power off\n");
gpio_set_level(GPIO_PMIC_PWRON_L, 1);
set_pmic_pwrok(0);
}
power_button_was_pressed = pressed;
@@ -312,6 +330,15 @@ void chipset_reset(int is_cold)
task_wake(TASK_ID_CHIPSET);
}
void chipset_force_shutdown(void)
{
/* Turn off all rails */
gpio_set_level(GPIO_EN_PP3300, 0);
gpio_set_level(GPIO_EN_PP1350, 0);
set_pmic_pwrok(0);
gpio_set_level(GPIO_EN_PP5000, 0);
}
/*****************************************************************************/
/**
@@ -381,7 +408,7 @@ static int power_on(void)
* Initiate PMIC power-on sequence only if cold booting AP to
* avoid accidental reset (crosbug.com/p/12650).
*/
gpio_set_level(GPIO_PMIC_PWRON_L, 0);
set_pmic_pwrok(1);
}
/* wait for all PMIC regulators to be ready */
@@ -450,7 +477,7 @@ static int react_to_xpshold(unsigned int timeout_us)
return -1;
}
CPRINTF("[%T XPSHOLD seen]\n");
gpio_set_level(GPIO_PMIC_PWRON_L, 1);
set_pmic_pwrok(0);
return 0;
}
@@ -462,10 +489,7 @@ static void power_off(void)
/* Call hooks before we drop power rails */
hook_notify(HOOK_CHIPSET_SHUTDOWN);
/* switch off all rails */
gpio_set_level(GPIO_EN_PP3300, 0);
gpio_set_level(GPIO_EN_PP1350, 0);
gpio_set_level(GPIO_PMIC_PWRON_L, 1);
gpio_set_level(GPIO_EN_PP5000, 0);
chipset_force_shutdown();
ap_on = 0;
ap_suspended = 0;
lid_changed = 0;

8
common/pmu_tps65090_charger.c
View File

@@ -100,13 +100,7 @@ static int system_off(void)
{
if (chipset_in_state(CHIPSET_STATE_ON)) {
CPUTS("[pmu] turn system off\n");
/* TODO(rongchang): need chipset_force_hard_off(),
* and remove these gpio hack
*/
gpio_set_level(GPIO_EN_PP3300, 0);
gpio_set_level(GPIO_EN_PP1350, 0);
gpio_set_level(GPIO_PMIC_PWRON_L, 1);
gpio_set_level(GPIO_EN_PP5000, 0);
chipset_force_shutdown();
}
return ST_IDLE;

4
include/chipset.h
View File

@@ -70,7 +70,6 @@ static inline void chipset_exit_hard_off(void) { }
*/
void chipset_throttle_cpu(int throttle);
#ifdef CONFIG_TASK_CHIPSET
/**
* Immedaitely shut off power to main processor and chipset.
*
@@ -78,9 +77,6 @@ void chipset_throttle_cpu(int throttle);
* critical.
*/
void chipset_force_shutdown(void);
#else
static inline void chipset_force_shutdown(void) { }
#endif
/**
* Reset the CPU and/or chipset.