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npcx: gpio: Remove DEBUG_GPIO to make gpio_interrupt reentrant

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GPIO interrupt priority levels can vary (notably, SHI CS interrupt is
higher) so gpio_interrupt must be reentrant.

BUG=chrome-os-partner:57434
BRANCH=Kevin
TEST=Stress test on kevin 'pd 1 reset' with OEM charger attached, verify
pdcmd task never gets wedged with TCPC ALERT stuck low.

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: If853b80ebcef622480389a7cc94e851de0f8bb20
Reviewed-on: https://chromium-review.googlesource.com/388745
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
(cherry picked from commit 011da7eb51c10a8e108bae0e489ff3ddc848ee33)
Reviewed-on: https://chromium-review.googlesource.com/388749
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This commit is contained in:
Shawn Nematbakhsh
2016-09-23 13:11:46 -07:00
committed by chrome-bot
parent a87663f6dc
commit 5fa727805c
2 changed files with 0 additions and 5 deletions
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4
chip/npcx/gpio.c
View File

@@ -744,11 +744,7 @@ DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT);
static void gpio_interrupt(int int_no)
{
#if DEBUG_GPIO
static uint8_t i, j, pin, wui_mask;
#else
uint8_t i, j, pin, wui_mask;
#endif
for (i = 0; i < ARRAY_SIZE(gpio_wui_table); i++) {
for (j = 0; j < ARRAY_SIZE(gpio_wui_table[0]); j++) {

1
chip/npcx/registers.h
View File

@@ -54,7 +54,6 @@
#define DEBUG_I2C 0
#define DEBUG_TMR 0
#define DEBUG_WDG 0
#define DEBUG_GPIO 1
#define DEBUG_FAN 0
#define DEBUG_PWM 0
#define DEBUG_SPI 0