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pd: samus: ryu: add Vconn support and enable for samus and ryu

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Add support for enabling USB type-C Vconn by defining CONFIG_USBC_VCONN.
Enable Vconn support for samus, ryu, and fruitpie.

BUG=chrome-os-partner:30445
BRANCH=samus
TEST=make buildall

Change-Id: Ibe247286c96fd5a8fa12c88a4e3a5fea02997134
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222284
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This commit is contained in:
Alec Berg
2014-10-08 09:33:35 -07:00
committed by chrome-internal-fetch
parent a194bede19
commit 61dc089e23
8 changed files with 40 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
board/fruitpie/board.h
View File

@@ -27,6 +27,7 @@
#define CONFIG_USB_PD_DUAL_ROLE
#define CONFIG_USB_PD_INTERNAL_COMP
#define CONFIG_USBC_SS_MUX
#define CONFIG_USBC_VCONN
#define CONFIG_ADC
#define CONFIG_HW_CRC
#define CONFIG_I2C

7
board/fruitpie/usb_pd_config.h
View File

@@ -138,6 +138,13 @@ static inline int pd_adc_read(int port, int cc)
return adc_read_channel(ADC_CH_CC2_PD);
}
static inline void pd_set_vconn(int port, int polarity, int enable)
{
/* Set VCONN on the opposite CC line from the polarity */
gpio_set_level(polarity ? GPIO_VCONN1_EN :
GPIO_VCONN2_EN, enable);
}
static inline int pd_snk_is_vbus_provided(int port)
{
return gpio_get_level(GPIO_VBUS_WAKE);

1
board/ryu/board.h
View File

@@ -25,6 +25,7 @@
#define CONFIG_USB_PD_FLASH_ERASE_CHECK
#define CONFIG_USB_PD_INTERNAL_COMP
#define CONFIG_USBC_SS_MUX
#define CONFIG_USBC_VCONN
#define CONFIG_ADC
#define CONFIG_HW_CRC
#define CONFIG_I2C

7
board/ryu/usb_pd_config.h
View File

@@ -147,6 +147,13 @@ static inline int pd_adc_read(int port, int cc)
return adc_read_channel(ADC_CC2_PD);
}
static inline void pd_set_vconn(int port, int polarity, int enable)
{
/* Set VCONN on the opposite CC line from the polarity */
gpio_set_level(polarity ? GPIO_USBC_VCONN1_EN :
GPIO_USBC_VCONN2_EN, enable);
}
static inline int pd_snk_is_vbus_provided(int port)
{
return gpio_get_level(GPIO_CHGR_ACOK);

1
board/samus_pd/board.h
View File

@@ -34,6 +34,7 @@
#define CONFIG_USB_PD_FLASH_ERASE_CHECK
#define CONFIG_USB_PD_INTERNAL_COMP
#define CONFIG_USBC_SS_MUX
#define CONFIG_USBC_VCONN
#define CONFIG_USB_SWITCH_TSU6721
#define CONFIG_VBOOT_HASH
#undef CONFIG_WATCHDOG_HELP

11
board/samus_pd/usb_pd_config.h
View File

@@ -227,6 +227,17 @@ static inline int pd_adc_read(int port, int cc)
return adc_read_channel(cc ? ADC_C1_CC2_PD : ADC_C1_CC1_PD);
}
static inline void pd_set_vconn(int port, int polarity, int enable)
{
/* Set VCONN on the opposite CC line from the polarity */
if (port == 0)
gpio_set_level(polarity ? GPIO_USB_C0_CC1_VCONN1_EN :
GPIO_USB_C0_CC2_VCONN1_EN, enable);
else
gpio_set_level(polarity ? GPIO_USB_C1_CC1_VCONN1_EN :
GPIO_USB_C1_CC2_VCONN1_EN, enable);
}
static inline int pd_snk_is_vbus_provided(int port)
{
return gpio_get_level(port ? GPIO_USB_C1_VBUS_WAKE :

11
common/usb_pd_protocol.c
View File

@@ -283,13 +283,16 @@ static inline void set_state(int port, enum pd_states next_state)
set_state_timeout(port, 0, 0);
pd[port].task_state = next_state;
#ifdef CONFIG_USBC_SS_MUX
if (next_state == PD_STATE_SRC_DISCONNECTED) {
pd[port].dev_id = 0;
#ifdef CONFIG_USBC_SS_MUX
board_set_usb_mux(port, TYPEC_MUX_NONE,
pd[port].polarity);
}
#endif
#ifdef CONFIG_USBC_VCONN
pd_set_vconn(port, pd[port].polarity, 0);
#endif
}
#ifdef CONFIG_LOW_POWER_IDLE
/* If any PD port is connected, then disable deep sleep */
@@ -1246,6 +1249,10 @@ void pd_task(void)
break;
}
#ifdef CONFIG_USBC_VCONN
pd_set_vconn(port, pd[port].polarity, 1);
#endif
set_state(port, PD_STATE_SRC_DISCOVERY);
caps_count = 0;
#ifdef CONFIG_USB_PD_DUAL_ROLE

3
include/config.h
View File

@@ -1041,6 +1041,9 @@
/* Support for USB type-c superspeed mux */
#undef CONFIG_USBC_SS_MUX
/* Support for USB type-c vconn. Not needed for captive cables. */
#undef CONFIG_USBC_VCONN
/*****************************************************************************/
/* USB interfaces config */