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https://github.com/Telecominfraproject/OpenCellular.git
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polyberry: add initial board build
This supports gpio initialization only. BUG=None TEST=Successfully checked console and available GPIO on sweetberry BRANCH=None Change-Id: Id50f66652b05c25a8c79ce2938fa161a944d93b8 Signed-off-by: Nick Sanders <nsanders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/399643 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
This commit is contained in:
Nick Sanders
106
board/polyberry/board.c
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106
board/polyberry/board.c
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/* Copyright 2016 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Polyberry board configuration */
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#include "common.h"
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#include "dma.h"
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#include "ec_version.h"
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#include "gpio.h"
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#include "gpio_list.h"
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#include "hooks.h"
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#include "registers.h"
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#include "stm32-dma.h"
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#include "task.h"
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#include "update_fw.h"
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#include "usb_descriptor.h"
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#include "util.h"
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#include "usb_dwc_hw.h"
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#include "usb_dwc_console.h"
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#include "usb_dwc_update.h"
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/******************************************************************************
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* Define the strings used in our USB descriptors.
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*/
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const void *const usb_strings[] = {
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[USB_STR_DESC] = usb_string_desc,
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[USB_STR_VENDOR] = USB_STRING_DESC("Google Inc."),
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[USB_STR_PRODUCT] = USB_STRING_DESC("Polyberry"),
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[USB_STR_SERIALNO] = USB_STRING_DESC("1234-a"),
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[USB_STR_VERSION] = USB_STRING_DESC(CROS_EC_VERSION32),
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[USB_STR_CONSOLE_NAME] = USB_STRING_DESC("Polyberry EC Shell"),
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[USB_STR_UPDATE_NAME] = USB_STRING_DESC("Firmware update"),
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};
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BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT);
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struct dwc_usb usb_ctl = {
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.ep = {
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&ep0_ctl,
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&ep_console_ctl,
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&usb_update_ep_ctl,
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},
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.speed = USB_SPEED_FS,
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.phy_type = USB_PHY_ULPI,
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.dma_en = 1,
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.irq = STM32_IRQ_OTG_HS,
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};
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/******************************************************************************
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* Support firmware upgrade over USB. We can update whichever section is not
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* the current section.
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*/
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/*
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* This array defines possible sections available for the firmware update.
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* The section which does not map the current executing code is picked as the
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* valid update area. The values are offsets into the flash space.
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*/
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const struct section_descriptor board_rw_sections[] = {
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{CONFIG_RO_MEM_OFF,
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CONFIG_RO_MEM_OFF + CONFIG_RO_SIZE},
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{CONFIG_RW_MEM_OFF,
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CONFIG_RW_MEM_OFF + CONFIG_RW_SIZE},
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};
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const struct section_descriptor * const rw_sections = board_rw_sections;
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const int num_rw_sections = ARRAY_SIZE(board_rw_sections);
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#define GPIO_SET_HS(bank, number) \
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(STM32_GPIO_OSPEEDR(GPIO_##bank) |= (0x3 << ((number) * 2)))
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void board_config_post_gpio_init(void)
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{
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/* We use MCO2 clock passthrough to provide a clock to USB HS */
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gpio_config_module(MODULE_MCO, 1);
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/* GPIO PC9 to high speed */
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GPIO_SET_HS(C, 9);
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if (usb_ctl.phy_type == USB_PHY_ULPI)
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gpio_set_level(GPIO_USB_MUX_SEL, 0);
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else
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gpio_set_level(GPIO_USB_MUX_SEL, 1);
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/* Set USB GPIO to high speed */
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GPIO_SET_HS(A, 11);
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GPIO_SET_HS(A, 12);
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GPIO_SET_HS(C, 3);
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GPIO_SET_HS(C, 2);
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GPIO_SET_HS(C, 0);
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GPIO_SET_HS(A, 5);
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GPIO_SET_HS(B, 5);
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GPIO_SET_HS(B, 13);
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GPIO_SET_HS(B, 12);
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GPIO_SET_HS(B, 2);
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GPIO_SET_HS(B, 10);
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GPIO_SET_HS(B, 1);
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GPIO_SET_HS(B, 0);
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GPIO_SET_HS(A, 3);
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}
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static void board_init(void)
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{
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}
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DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
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89
board/polyberry/board.h
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89
board/polyberry/board.h
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@@ -0,0 +1,89 @@
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/* Copyright 2016 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Polyberry configuration */
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#ifndef __CROS_EC_BOARD_H
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#define __CROS_EC_BOARD_H
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/* Use external clock */
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#define CONFIG_STM32_CLOCK_HSE_HZ 24000000
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#define CONFIG_BOARD_POST_GPIO_INIT
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/* Enable console recasting of GPIO type. */
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#define CONFIG_CMD_GPIO_EXTENDED
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/* The UART console is on test points USART3 (PC10/PC11) */
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#undef CONFIG_UART_CONSOLE
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#define CONFIG_UART_CONSOLE 3
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#undef CONFIG_UART_TX_BUF_SIZE
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#define CONFIG_UART_TX_BUF_SIZE 4096
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/* Don't waste precious DMA channels on console. */
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#undef CONFIG_UART_TX_DMA
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#undef CONFIG_UART_RX_DMA
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#define CONFIG_UART_TX_REQ_CH 4
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#define CONFIG_UART_RX_REQ_CH 4
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/* USB Configuration */
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#define CONFIG_USB
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#define CONFIG_USB_PID 0x5020
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#define CONFIG_USB_CONSOLE
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#define CONFIG_STREAM_USB
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#define CONFIG_USB_UPDATE
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#undef CONFIG_USB_MAXPOWER_MA
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#define CONFIG_USB_MAXPOWER_MA 100
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#define CONFIG_USB_SERIALNO
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#define DEFAULT_SERIALNO "Uninitialized"
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/* USB interface indexes (use define rather than enum to expand them) */
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#define USB_IFACE_CONSOLE 0
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#define USB_IFACE_UPDATE 1
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#define USB_IFACE_COUNT 2
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/* USB endpoint indexes (use define rather than enum to expand them) */
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#define USB_EP_CONTROL 0
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#define USB_EP_CONSOLE 1
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#define USB_EP_UPDATE 2
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#define USB_EP_COUNT 3
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/* This is not actually a Chromium EC so disable some features. */
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#undef CONFIG_WATCHDOG_HELP
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#undef CONFIG_LID_SWITCH
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#undef CONFIG_WATCHDOG
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/* Optional features */
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#define CONFIG_STM_HWTIMER32
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/*
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* Allow dangerous commands all the time, since we don't have a write protect
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* switch.
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*/
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#define CONFIG_SYSTEM_UNLOCKED
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#ifndef __ASSEMBLER__
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/* Timer selection */
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#define TIM_CLOCK32 5
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#include "gpio_signal.h"
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/* USB string indexes */
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enum usb_strings {
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USB_STR_DESC = 0,
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USB_STR_VENDOR,
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USB_STR_PRODUCT,
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USB_STR_SERIALNO,
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USB_STR_VERSION,
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USB_STR_CONSOLE_NAME,
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USB_STR_UPDATE_NAME,
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USB_STR_COUNT
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};
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#endif /* !__ASSEMBLER__ */
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#endif /* __CROS_EC_BOARD_H */
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12
board/polyberry/build.mk
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12
board/polyberry/build.mk
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@@ -0,0 +1,12 @@
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# -*- makefile -*-
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# Copyright 2016 The Chromium OS Authors. All rights reserved.
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# Use of this source code is governed by a BSD-style license that can be
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# found in the LICENSE file.
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#
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# Board specific files build
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CHIP:=stm32
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CHIP_FAMILY:=stm32f4
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CHIP_VARIANT:=stm32f446
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board-y=board.o
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21
board/polyberry/ec.tasklist
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21
board/polyberry/ec.tasklist
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@@ -0,0 +1,21 @@
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/* Copyright 2016 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/**
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* List of enabled tasks in the priority order
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*
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* The first one has the lowest priority.
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*
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* For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
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* TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
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* where :
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* 'n' in the name of the task
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* 'r' in the main routine of the task
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* 'd' in an opaque parameter passed to the routine at startup
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* 's' is the stack size in bytes; must be a multiple of 8
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*/
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#define CONFIG_TASK_LIST \
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TASK_ALWAYS(HOOKS, hook_task, NULL, VENTI_TASK_STACK_SIZE) \
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TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE)
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82
board/polyberry/gpio.inc
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82
board/polyberry/gpio.inc
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@@ -0,0 +1,82 @@
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/* -*- mode:c -*-
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*
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* Copyright 2016 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Declare symbolic names for all the GPIOs that we care about.
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* Note: Those with interrupt handlers must be declared first. */
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/* Outputs */
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GPIO(PM_RESET_L, PIN(D, 0), GPIO_OUT_HIGH)
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GPIO(PM_KPD_PWR_L, PIN(D, 1), GPIO_OUT_HIGH)
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GPIO(AP_RESET_L, PIN(D, 2), GPIO_OUT_HIGH)
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GPIO(AP_FORCED_USB_BOOT, PIN(D, 3), GPIO_OUT_LOW)
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GPIO(AP_PS_HOLD, PIN(D, 4), GPIO_OUT_HIGH)
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GPIO(MUX_EN_L, PIN(A, 7), GPIO_INPUT)
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GPIO(USB_MUX_SEL, PIN(A, 6), GPIO_OUT_HIGH)
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GPIO(PHY_RESET, PIN(C, 4), GPIO_INPUT)
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GPIO(LED_BLUE, PIN(A, 2), GPIO_ODR_LOW)
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GPIO(LED_GRN, PIN(B, 8), GPIO_ODR_LOW)
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GPIO(LED_RED, PIN(B, 15), GPIO_ODR_LOW)
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/* Clock function */
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GPIO(MCU_TO_PHY_MCO, PIN(C, 9), GPIO_INPUT)
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/* These pin assignments aren't used as GPIO. Let's note them here
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* for readability but not initialize them.
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* USART1 TX/RX - AP
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* GPIO(MCU_UART1_TX, PIN(A, 9), GPIO_INPUT)
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* GPIO(MCU_UART1_RX, PIN(A, 10), GPIO_INPUT)
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* USART2 TX/RX - Sensor Hub
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* GPIO(MCU_UART2_TX, PIN(D, 5), GPIO_INPUT)
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* GPIO(MCU_UART2_RX, PIN(D, 6), GPIO_INPUT)
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* USART3 TX/RX - Console
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* GPIO(MCU_UART3_TX, PIN(C, 10), GPIO_INPUT)
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* GPIO(MCU_UART3_RX, PIN(C, 11), GPIO_INPUT)
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* USART5 TX/RX - SSC (?)
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* GPIO(MCU_UART5_TX, PIN(E, 7), GPIO_INPUT)
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* GPIO(MCU_UART5_RX, PIN(E, 8), GPIO_INPUT)
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*/
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/* USB pins */
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GPIO(USB_FS_DM, PIN(A, 11), GPIO_INPUT)
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GPIO(USB_FS_DP, PIN(A, 12), GPIO_INPUT)
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GPIO(USB_HS_ULPI_NXT, PIN(C, 3), GPIO_INPUT)
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GPIO(USB_HS_ULPI_DIR, PIN(C, 2), GPIO_INPUT)
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GPIO(USB_HS_ULPI_STP, PIN(C, 0), GPIO_INPUT)
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GPIO(USB_HS_ULPI_CK, PIN(A, 5), GPIO_INPUT)
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GPIO(USB_HS_ULPI_D7, PIN(B, 5), GPIO_INPUT)
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GPIO(USB_HS_ULPI_D6, PIN(B,13), GPIO_INPUT)
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GPIO(USB_HS_ULPI_D5, PIN(B,12), GPIO_INPUT)
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GPIO(USB_HS_ULPI_D4, PIN(B, 2), GPIO_INPUT)
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GPIO(USB_HS_ULPI_D3, PIN(B,10), GPIO_INPUT)
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GPIO(USB_HS_ULPI_D2, PIN(B, 1), GPIO_INPUT)
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GPIO(USB_HS_ULPI_D1, PIN(B, 0), GPIO_INPUT)
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GPIO(USB_HS_ULPI_D0, PIN(A, 3), GPIO_INPUT)
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/* Unimplemented signals since we are not an EC */
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UNIMPLEMENTED(ENTERING_RW)
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UNIMPLEMENTED(WP_L)
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ALTERNATE(PIN_MASK(A, 0x0600), 7, MODULE_UART, 0) /* USART1: PA9/PA10 - AP */
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ALTERNATE(PIN_MASK(D, 0x0060), 7, MODULE_UART, 0) /* USART2: PD5/PD6 - SH */
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ALTERNATE(PIN_MASK(C, 0x0c00), 7, MODULE_UART, 0) /* USART3: PC10/PC11 - Console */
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ALTERNATE(PIN_MASK(D, 0x00c0), 8, MODULE_UART, 0) /* USART5: PE7/PE8 - SSC */
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/* OTG FS */
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ALTERNATE(PIN_MASK(A, 0x1800), 10, MODULE_USB, 0) /* DWC USB OTG: PA11/12 */
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/* OTG HS */
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ALTERNATE(PIN_MASK(A, 0x0028), 10, MODULE_USB, 0) /* DWC USB OTG HS */
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ALTERNATE(PIN_MASK(B, 0x3427), 10, MODULE_USB, 0) /* DWC USB OTG HS */
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ALTERNATE(PIN_MASK(C, 0x000d), 10, MODULE_USB, 0) /* DWC USB OTG HS */
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ALTERNATE(PIN_MASK(C, 0x0200), 0, MODULE_MCO, 0) /* MCO2: PC9 */
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@@ -89,6 +89,7 @@ BOARDS_STM32_DFU=(
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servo_v4
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servo_micro
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sweetberry
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polyberry
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stm32f446e-eval
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)
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