stm32l: Disable interrupts while running from flash

The curent code ends up creating a veneer for interrupt_enable/disable()
which isn't really needed (see below). By calling the interrupt code while
still running from flash we can avoid this.

I cannot see any problem with the current implementation, but it seems that
with this patch I also avoid an exception.

BUG=chrome-os-partner:20976
BRANCH=none
TEST=manual
Build EC and see code generated like this:

200029ec <iram_flash_write>:
200029ec:	b538      	push	{r3, r4, r5, lr}
200029ee:	460d      	mov	r5, r1
200029f0:	4604      	mov	r4, r0
200029f2:	f000 f83d 	bl	20002a70 <__interrupt_disable_veneer>
...

20002a4a:	f000 b809 	b.w	20002a60 <__interrupt_enable_veneer>
20002a4e:	bf00      	nop

20002a60 <__interrupt_enable_veneer>:
20002a60:	b401      	push	{r0}
20002a62:	4802      	ldr	r0, [pc, #8]	; (20002a6c <__interrupt_enable_veneer+0xc>)
20002a64:	4684      	mov	ip, r0
20002a66:	bc01      	pop	{r0}
20002a68:	4760      	bx	ip
20002a6a:	bf00      	nop
20002a6c:	080007f5 	.word	0x080007f5

20002a70 <__interrupt_disable_veneer>:
20002a70:	b401      	push	{r0}
20002a72:	4802      	ldr	r0, [pc, #8]	; (20002a7c <__interrupt_disable_veneer+0xc>)
20002a74:	4684      	mov	ip, r0
20002a76:	bc01      	pop	{r0}
20002a78:	4760      	bx	ip
20002a7a:	bf00      	nop
20002a7c:	080007f1 	.word	0x080007f1

With this patch the veneers go away.

Change-Id: Idfe173b4c8d45a142914b2388bcff8ba708c657c
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/62243
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This commit is contained in:
Simon Glass
2013-07-16 16:47:27 -06:00
committed by ChromeBot
parent df79191f84
commit 7189a9762e

View File

@@ -138,8 +138,6 @@ void __attribute__((section(".iram.text")))
{
int i;
interrupt_disable();
/* Wait for ready */
for (i = 0; (STM32_FLASH_SR & 1) && (i < flash_timeout_loop) ;
i++)
@@ -159,8 +157,6 @@ void __attribute__((section(".iram.text")))
/* Disable PROG and FPRG bits */
STM32_FLASH_PECR &= ~(STM32_FLASH_PECR_PROG | STM32_FLASH_PECR_FPRG);
interrupt_enable();
}
int flash_physical_write(int offset, int size, const char *data)
@@ -215,7 +211,9 @@ int flash_physical_write(int offset, int size, const char *data)
size -= sizeof(uint32_t);
} else {
/* Half page write */
interrupt_disable();
iram_flash_write(address, data32);
interrupt_enable();
address += CONFIG_FLASH_WRITE_SIZE / sizeof(uint32_t);
data32 += CONFIG_FLASH_WRITE_SIZE / sizeof(uint32_t);
size -= CONFIG_FLASH_WRITE_SIZE;