reef: enable tcpc low power mode

BUG=chrome-os-partner:55158,chrome-os-partner:55889,chrome-os-partner:55890
BRANCH=none
TEST=on reef use ina (pp3300_pd_a_mw) to check tcpc power consumption

Change-Id: I5a2904f4e549b7da22242848bb3b1887331ecadd
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/399882
Reviewed-by: David Hendricks <dhendrix@chromium.org>

board/reef/board.c

@@ -76,6 +76,26 @@ static void tcpc_alert_event(enum gpio_signal signal)
 #endif
 }
 
+#ifdef CONFIG_USB_PD_TCPC_LOW_POWER
+static void anx74xx_cable_det_handler(void)
+{
+	/* confirm if cable_det is asserted */
+	if (!gpio_get_level(GPIO_USB_C0_CABLE_DET) ||
+		gpio_get_level(GPIO_USB_C0_PD_RST_L))
+		return;
+
+	task_set_event(TASK_ID_PD_C0, PD_EVENT_TCPC_RESET, 0);
+}
+DECLARE_DEFERRED(anx74xx_cable_det_handler);
+DECLARE_HOOK(HOOK_CHIPSET_RESUME, anx74xx_cable_det_handler, HOOK_PRIO_LAST);
+
+void anx74xx_cable_det_interrupt(enum gpio_signal signal)
+{
+	/* debounce for 2ms */
+	hook_call_deferred(&anx74xx_cable_det_handler_data, (2 * MSEC));
+}
+#endif
+
 /*
  * enable_input_devices() is called by the tablet_mode ISR, but changes the
  * state of GPIOs, so its definition must reside after including gpio_list.
@@ -250,12 +270,11 @@ struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = {
 /* called from anx74xx_set_power_mode() */
 void board_set_tcpc_power_mode(int port, int mode)
 {
-	/*
-	 * This is called during init by the ANX driver to take the TCPC out
-	 * of reset and enable power. Since we have two TCPC chips and one
-	 * power enable on Reef, we take both chips out of reset in a
-	 * separate function.
-	 */
+	if (port == 0) {
+		gpio_set_level(GPIO_USB_C0_PD_RST_L, mode);
+		msleep(mode ? 10 : 1);
+		gpio_set_level(GPIO_EN_USB_TCPC_PWR, mode);
+	}
 }
 
 /**
@@ -269,9 +288,7 @@ void board_reset_pd_mcu(void)
 	gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 0);
 
 	/* Assert reset to TCPC0 */
-	gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
-	msleep(1);
-	gpio_set_level(GPIO_EN_USB_TCPC_PWR, 0);
+	board_set_tcpc_power_mode(0, 0);
 
 	/* Deassert reset to TCPC1 */
 	gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 1);
@@ -280,9 +297,7 @@ void board_reset_pd_mcu(void)
 	msleep(10);
 
 	/* Deassert reset to TCPC0 */
-	gpio_set_level(GPIO_EN_USB_TCPC_PWR, 1);
-	msleep(10);
-	gpio_set_level(GPIO_USB_C0_PD_RST_L, 1);
+	board_set_tcpc_power_mode(0, 1);
 }
 
 #ifdef CONFIG_USB_PD_TCPC_FW_VERSION
@@ -326,6 +341,10 @@ void board_tcpc_init(void)
 	/* Enable TCPC1 interrupt */
 	gpio_enable_interrupt(GPIO_USB_C1_PD_INT_ODL);
 
+#ifdef CONFIG_USB_PD_TCPC_LOW_POWER
+	/* Enable CABLE_DET interrupt for ANX3429 wake from standby */
+	gpio_enable_interrupt(GPIO_USB_C0_CABLE_DET);
+#endif
 	/*
 	* Initialize HPD to low; after sysjump SOC needs to see
 	* HPD pulse to enable video path

board/reef/board.h

@@ -87,6 +87,7 @@
 #define CONFIG_USB_PD_PORT_COUNT 2
 #define CONFIG_USB_PD_QUIRK_SLOW_CC_STATUS
 #define CONFIG_USB_PD_VBUS_DETECT_CHARGER
+#define CONFIG_USB_PD_TCPC_LOW_POWER
 #define CONFIG_USB_PD_TCPC_FW_VERSION
 #define CONFIG_USB_PD_TCPM_MUX  /* for both PS8751 and ANX3429 */
 #define CONFIG_USB_PD_TCPM_ANX74XX

board/reef/gpio.inc

@@ -17,6 +17,8 @@ GPIO_INT(CHARGER_INT_L,		PIN(3, 3), GPIO_INT_FALLING, bd9995x_vbus_interrupt)		/
 GPIO_INT(USB_C0_PD_INT_ODL,	PIN(3, 7), GPIO_INT_FALLING, tcpc_alert_event)			/* from Analogix TCPC */
 GPIO_INT(USB_C1_PD_INT_ODL,	PIN(B, 1), GPIO_INT_FALLING | GPIO_PULL_UP, tcpc_alert_event)	/* from Parade TCPC */
 
+GPIO_INT(USB_C0_CABLE_DET,	PIN(C, 5), GPIO_INT_RISING, anx74xx_cable_det_interrupt)	/* CABLE_DET from ANX3429 */
+
 GPIO_INT(PCH_SLP_S4_L,		PIN(8, 6), GPIO_INT_BOTH, power_signal_interrupt)		/* SLP_S4_L */
 GPIO_INT(PCH_SLP_S3_L,		PIN(7, 3), GPIO_INT_BOTH, power_signal_interrupt)		/* SLP_S3_L */
 GPIO_INT(PCH_SLP_S0_L,		PIN(7, 5), GPIO_INT_BOTH, power_signal_interrupt)		/* SLP_S0_L */
@@ -76,13 +78,6 @@ GPIO(CCD_MODE_ODL,		PIN(6, 3), GPIO_INPUT)
 GPIO(EC_HAVEN_RESET_ODL,	PIN(0, 2), GPIO_ODR_HIGH)
 GPIO(ENTERING_RW,		PIN(7, 6), GPIO_OUTPUT)			/* EC_ENTERING_RW */
 
-/*
- * FIXME(dhendrix): Should this be an interrupt? It's a normal input on elm.
- * ANX72xx programming guide section 6 suggests it should interrupt on both
- * high and low edges and we should use it to set PWR_EN and RESET_N pins.
- */
-GPIO(USB_C0_CABLE_DET,		PIN(C, 5), GPIO_INPUT)
-
 GPIO(PCH_RSMRST_L,		PIN(7, 0), GPIO_OUT_LOW)
 GPIO(EC_BATT_PRES_L,		PIN(3, 4), GPIO_INPUT)
 GPIO(PMIC_EN,			PIN(8, 5), GPIO_OUT_LOW)

common/usb_pd_protocol.c

@@ -2799,6 +2799,9 @@ defined(CONFIG_CASE_CLOSED_DEBUG_EXTERNAL)
 				tcpm_set_drp_toggle(port);
 				pd[port].flags |= PD_FLAGS_TCPC_DRP_TOGGLE;
 				timeout = -1;
+#ifdef CONFIG_USB_PD_TCPC_LOW_POWER
+				CPRINTS("TCPC p%d Low Power Mode", port);
+#endif
 			}
 			set_state(port, next_state);
 

driver/tcpm/anx74xx.c

@@ -556,6 +556,9 @@ static int anx74xx_tcpc_drp_toggle(int port)
 	/* Disable CC software Control */
 	rv = anx74xx_cc_software_ctrl(port, 0);
 
+#ifdef CONFIG_USB_PD_TCPC_LOW_POWER
+	anx74xx_set_power_mode(port, ANX74XX_STANDBY_MODE);
+#endif
 	return rv;
 }
 #endif

driver/tcpm/tcpci.c

@@ -142,6 +142,9 @@ static int tcpci_tcpc_drp_toggle(int port)
 	rv |= tcpc_write(port, TCPC_REG_COMMAND,
 			 TCPC_REG_COMMAND_LOOK4CONNECTION);
 
+#ifdef CONFIG_USB_PD_TCPC_LOW_POWER
+	rv |= tcpc_write(port, TCPC_REG_COMMAND, TCPC_REG_COMMAND_I2CIDLE);
+#endif
 	return rv;
 }
 #endif

driver/tcpm/tcpci.h

@@ -82,6 +82,7 @@
 
 #define TCPC_REG_COMMAND           0x23
 #define TCPC_REG_COMMAND_LOOK4CONNECTION	0x99
+#define TCPC_REG_COMMAND_I2CIDLE		0xFF
 
 #define TCPC_REG_DEV_CAP_1         0x24
 #define TCPC_REG_DEV_CAP_2         0x26

include/config.h

@@ -2117,6 +2117,9 @@
 /* Get TCPC firmware version */
 #undef CONFIG_USB_PD_TCPC_FW_VERSION
 
+/* Enable TCPC to enter low power mode */
+#undef CONFIG_USB_PD_TCPC_LOW_POWER
+
 /*
  * Track VBUS level in TCPC module. This will only be needed if we're acting
  * as an external TCPC.