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nocturne: Add PMIC init.
The 5V power good needs to be masked in the ROP PMIC otherwise the PMIC resets the EC rails after about ~4s. Additionally, changed EC_PLATFORM_RST to an output. BUG=None BRANCH=poppy TEST=Check that 5V PG is masked in the PMIC. Change-Id: Id06c85d1cea9a35d9e7418de5c0e9d0abd620607 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1055908 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Benson Leung <bleung@chromium.org> (cherry picked from commit 9ebdc6c252d8d55c51ccc954e9957c908b4e1a60) Reviewed-on: https://chromium-review.googlesource.com/1058887 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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@@ -335,6 +335,18 @@ static void board_init(void)
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}
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DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
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static void board_pmic_init(void)
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{
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int pgmask1;
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/* Mask V5A_DS3_PG from PMIC PGMASK1. */
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if (i2c_read8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x18, &pgmask1))
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return;
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pgmask1 |= (1 << 2);
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i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x18, pgmask1);
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}
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DECLARE_HOOK(HOOK_INIT, board_pmic_init, HOOK_PRIO_DEFAULT);
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void board_overcurrent_event(int port)
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{
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/* Sanity check the port. */
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@@ -71,7 +71,7 @@ GPIO(CCD_MODE_ODL, PIN(E, 3), GPIO_INPUT)
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GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT)
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GPIO(EC_ENTERING_RW, PIN(E, 1), GPIO_OUT_LOW)
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GPIO(EC_BL_DISABLE_ODL, PIN(D, 3), GPIO_ODR_HIGH)
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GPIO(EC_PLATFORM_RST, PIN(8, 6), GPIO_INPUT)
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GPIO(EC_PLATFORM_RST, PIN(8, 6), GPIO_OUT_LOW)
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GPIO(EC_GPIO31, PIN(3, 1), GPIO_OUT_LOW)
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GPIO(BASE_PWR_EN, PIN(2, 2), GPIO_OUT_LOW)
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GPIO(PP3300_NVME_EN, PIN(2, 1), GPIO_OUT_LOW)
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