nocturne: Add PMIC init.

The 5V power good needs to be masked in the ROP PMIC otherwise the PMIC
resets the EC rails after about ~4s.  Additionally, changed
EC_PLATFORM_RST to an output.

BUG=None
BRANCH=poppy
TEST=Check that 5V PG is masked in the PMIC.

Change-Id: Id06c85d1cea9a35d9e7418de5c0e9d0abd620607
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1055908
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Benson Leung <bleung@chromium.org>
(cherry picked from commit 9ebdc6c252d8d55c51ccc954e9957c908b4e1a60)
Reviewed-on: https://chromium-review.googlesource.com/1058887
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This commit is contained in:
Aseda Aboagye
2018-05-11 19:49:38 -07:00
committed by chrome-bot
parent ed45aba4bd
commit 781f3eca1f
2 changed files with 13 additions and 1 deletions

View File

@@ -335,6 +335,18 @@ static void board_init(void)
}
DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
static void board_pmic_init(void)
{
int pgmask1;
/* Mask V5A_DS3_PG from PMIC PGMASK1. */
if (i2c_read8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x18, &pgmask1))
return;
pgmask1 |= (1 << 2);
i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x18, pgmask1);
}
DECLARE_HOOK(HOOK_INIT, board_pmic_init, HOOK_PRIO_DEFAULT);
void board_overcurrent_event(int port)
{
/* Sanity check the port. */

View File

@@ -71,7 +71,7 @@ GPIO(CCD_MODE_ODL, PIN(E, 3), GPIO_INPUT)
GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT)
GPIO(EC_ENTERING_RW, PIN(E, 1), GPIO_OUT_LOW)
GPIO(EC_BL_DISABLE_ODL, PIN(D, 3), GPIO_ODR_HIGH)
GPIO(EC_PLATFORM_RST, PIN(8, 6), GPIO_INPUT)
GPIO(EC_PLATFORM_RST, PIN(8, 6), GPIO_OUT_LOW)
GPIO(EC_GPIO31, PIN(3, 1), GPIO_OUT_LOW)
GPIO(BASE_PWR_EN, PIN(2, 2), GPIO_OUT_LOW)
GPIO(PP3300_NVME_EN, PIN(2, 1), GPIO_OUT_LOW)