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yorp: Configure GPIO_HIB_WAKE_HIGH for AC_PRESENT

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AC_PRESENT is active high and hence GPIO_HIB_WAKE_HIGH needs to be set
in order to wake the EC up from hibernate.

BUG=b:79220888
BRANCH=None
TEST=make -j BOARD=yorp

Change-Id: I91e1c2f0b615b8272d3d1916a284d34a56959f82
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1043343
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
This commit is contained in:
Furquan Shaikh
2018-05-03 16:32:50 -07:00
committed by chrome-bot
parent ac929b674d
commit 7fa708389a
1 changed files with 4 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
board/yorp/gpio.inc
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@@ -11,8 +11,8 @@
/* Wake Source interrupts */
GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH |
GPIO_HIB_WAKE_HIGH, lid_interrupt)
GPIO_INT(WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) /* EC_WP_ODL */
GPIO_INT(POWER_BUTTON_L, PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt) /* EC_PWR_BTN_ODL */
GPIO_INT(AC_PRESENT, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) /* ACOK_OD */
/* USB-C interrupts */
GPIO_INT(USB_C0_PD_INT_ODL, PIN(6, 1), GPIO_INT_FALLING, tcpc_alert_event)
@@ -29,7 +29,9 @@ GPIO_INT(PCH_SLP_S3_L, PIN(A, 6), GPIO_INT_BOTH, power_signal_interrupt) /* SLP
GPIO_INT(SUSPWRDNACK, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) /* SUSPWRDNACK */
GPIO_INT(RSMRST_L_PGOOD, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt) /* PMIC_EC_RSMRST_ODL */
GPIO_INT(ALL_SYS_PGOOD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) /* PMIC_EC_PWROK_OD */
GPIO_INT(AC_PRESENT, PIN(0, 0), GPIO_INT_BOTH, extpower_interrupt) /* ACOK_OD */
/* Other interrupts */
GPIO_INT(WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) /* EC_WP_ODL */
/* TODO(b/74932344): Make it as an interrupt after driver supports this */
GPIO(BASE_SIXAXIS_INT_L, PIN(5, 6), GPIO_INPUT | GPIO_SEL_1P8V)