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chell: Add EC/PD configuration for chell board

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Add new EC board for chell proto:
- no motion sensors or tablet mode
- no independent volume buttons
- no ALS
- 2x PS8740 USB MUX
- apply PMIC_LDO_EN behavior by default
- leave SLP_S0 workaround in place until HW is updated
- misc GPIO changes
- update battery info with basic 3S config from blaze
- remove custom battery charger profile

The PD board is a symlink to glados as it appears to be the same.

BUG=chrome-os-partner:46289
BRANCH=none
TEST=make -j BOARD=chell ; make -j BOARD=chell_pd

Change-Id: I1084d663b06eeb55f035b10eb776a2e30e0f7074
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/304398
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie
2015-10-08 09:14:50 -07:00
committed by chrome-bot
parent e337adc6e9
commit 84e27570e9
12 changed files with 1409 additions and 0 deletions
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1
board/chell/Makefile Symbolic link
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../../Makefile

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board/chell/battery.c Normal file
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/* Copyright 2015 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
* Battery pack vendor provided charging profile
*/
#include "battery.h"
#include "battery_smart.h"
#include "charge_state.h"
#include "console.h"
#include "ec_commands.h"
#include "util.h"
/* Shutdown mode parameter to write to manufacturer access register */
#define SB_SHUTDOWN_DATA 0x0010
/* Battery info for proto */
static const struct battery_info info = {
.voltage_max = 13050, /* mV */
.voltage_normal = 11400,
.voltage_min = 9000,
.precharge_current = 392, /* mA */
.start_charging_min_c = 0,
.start_charging_max_c = 60,
.charging_min_c = 0,
.charging_max_c = 60,
.discharging_min_c = 0,
.discharging_max_c = 60,
};
const struct battery_info *battery_get_info(void)
{
return &info;
}
int board_cut_off_battery(void)
{
int rv;
/* Ship mode command must be sent twice to take effect */
rv = sb_write(SB_MANUFACTURER_ACCESS, SB_SHUTDOWN_DATA);
if (rv != EC_SUCCESS)
return EC_RES_ERROR;
rv = sb_write(SB_MANUFACTURER_ACCESS, SB_SHUTDOWN_DATA);
return rv ? EC_RES_ERROR : EC_RES_SUCCESS;
}

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/* Copyright 2015 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* Chell board-specific configuration */
#include "adc_chip.h"
#include "bd99992gw.h"
#include "charge_manager.h"
#include "charge_state.h"
#include "charger.h"
#include "chipset.h"
#include "console.h"
#include "extpower.h"
#include "gpio.h"
#include "hooks.h"
#include "host_command.h"
#include "i2c.h"
#include "keyboard_scan.h"
#include "lid_switch.h"
#include "pi3usb9281.h"
#include "power.h"
#include "power_button.h"
#include "spi.h"
#include "switch.h"
#include "system.h"
#include "task.h"
#include "temp_sensor.h"
#include "timer.h"
#include "uart.h"
#include "usb_charge.h"
#include "usb_mux.h"
#include "usb_pd.h"
#include "usb_pd_tcpm.h"
#include "util.h"
#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP)
#define GPIO_KB_OUTPUT (GPIO_ODR_HIGH)
#define GPIO_KB_OUTPUT_COL2 (GPIO_OUT_LOW)
#define I2C_ADDR_BD99992 0x60
/* Exchange status with PD MCU. */
static void pd_mcu_interrupt(enum gpio_signal signal)
{
#ifdef HAS_TASK_PDCMD
/* Exchange status with PD MCU to determine interrupt cause */
host_command_pd_send_status(0);
#endif
}
void vbus0_evt(enum gpio_signal signal)
{
/* VBUS present GPIO is inverted */
usb_charger_vbus_change(0, !gpio_get_level(signal));
task_wake(TASK_ID_PD_C0);
}
void vbus1_evt(enum gpio_signal signal)
{
/* VBUS present GPIO is inverted */
usb_charger_vbus_change(1, !gpio_get_level(signal));
task_wake(TASK_ID_PD_C1);
}
void usb0_evt(enum gpio_signal signal)
{
task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12, 0);
}
void usb1_evt(enum gpio_signal signal)
{
task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12, 0);
}
#include "gpio_list.h"
/* power signal list. Must match order of enum power_signal. */
const struct power_signal_info power_signal_list[] = {
{GPIO_RSMRST_L_PGOOD, 1, "RSMRST_N_PWRGD"},
{GPIO_PCH_SLP_S0_L, 1, "SLP_S0_DEASSERTED"},
{GPIO_PCH_SLP_S3_L, 1, "SLP_S3_DEASSERTED"},
{GPIO_PCH_SLP_S4_L, 1, "SLP_S4_DEASSERTED"},
{GPIO_PCH_SLP_SUS_L, 1, "SLP_SUS_DEASSERTED"},
{GPIO_PMIC_DPWROK, 1, "PMIC_DPWROK"},
};
BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
/* ADC channels */
const struct adc_t adc_channels[] = {
/* Vbus sensing. Converted to mV, full ADC is equivalent to 33V. */
[ADC_VBUS] = {"VBUS", 33000, 1024, 0, 1},
/* Adapter current output or battery discharging current */
[ADC_AMON_BMON] = {"AMON_BMON", 1, 1, 0, 3},
/* System current consumption */
[ADC_PSYS] = {"PSYS", 1, 1, 0, 4},
};
BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
const struct i2c_port_t i2c_ports[] = {
{"pmic", MEC1322_I2C0_0, 400, GPIO_I2C0_0_SCL, GPIO_I2C0_0_SDA},
{"muxes", MEC1322_I2C0_1, 400, GPIO_I2C0_1_SCL, GPIO_I2C0_1_SDA},
{"pd_mcu", MEC1322_I2C1, 1000, GPIO_I2C1_SCL, GPIO_I2C1_SDA},
{"batt", MEC1322_I2C3, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA},
};
const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
/* SPI devices */
const struct spi_device_t spi_devices[] = {
{ CONFIG_SPI_FLASH_PORT, 0, GPIO_PVT_CS0},
};
const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices);
const enum gpio_signal hibernate_wake_pins[] = {
GPIO_AC_PRESENT,
GPIO_LID_OPEN,
GPIO_POWER_BUTTON_L,
};
const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);
struct pi3usb9281_config pi3usb9281_chips[] = {
{
.i2c_port = I2C_PORT_USB_CHARGER_1,
.mux_lock = NULL,
},
{
.i2c_port = I2C_PORT_USB_CHARGER_2,
.mux_lock = NULL,
},
};
BUILD_ASSERT(ARRAY_SIZE(pi3usb9281_chips) ==
CONFIG_USB_SWITCH_PI3USB9281_CHIP_COUNT);
struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = {
{
.port_addr = 0x34,
.driver = &ps8740_usb_mux_driver,
},
{
.port_addr = 0x20,
.driver = &ps8740_usb_mux_driver,
}
};
/**
* Reset PD MCU
*/
void board_reset_pd_mcu(void)
{
gpio_set_level(GPIO_PD_RST_L, 0);
usleep(100);
gpio_set_level(GPIO_PD_RST_L, 1);
}
const struct temp_sensor_t temp_sensors[] = {
{"Battery", TEMP_SENSOR_TYPE_BATTERY, charge_temp_sensor_get_val, 0, 4},
/* These BD99992GW temp sensors are only readable in S0 */
{"Ambient", TEMP_SENSOR_TYPE_BOARD, bd99992gw_get_val,
BD99992GW_ADC_CHANNEL_SYSTHERM0, 4},
{"Charger", TEMP_SENSOR_TYPE_BOARD, bd99992gw_get_val,
BD99992GW_ADC_CHANNEL_SYSTHERM1, 4},
{"DRAM", TEMP_SENSOR_TYPE_BOARD, bd99992gw_get_val,
BD99992GW_ADC_CHANNEL_SYSTHERM2, 4},
{"Wifi", TEMP_SENSOR_TYPE_BOARD, bd99992gw_get_val,
BD99992GW_ADC_CHANNEL_SYSTHERM3, 4},
};
BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
/*
* Thermal limits for each temp sensor. All temps are in degrees K. Must be in
* same order as enum temp_sensor_id. To always ignore any temp, use 0.
*/
struct ec_thermal_config thermal_params[] = {
/* {Twarn, Thigh, Thalt}, fan_off, fan_max */
{{0, 0, 0}, 0, 0}, /* Battery */
{{0, 0, 0}, 0, 0}, /* Ambient */
{{0, 0, 0}, 0, 0}, /* Charger */
{{0, 0, 0}, 0, 0}, /* DRAM */
{{0, 0, 0}, 0, 0}, /* Wifi */
};
BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT);
static void board_pmic_init(void)
{
/* No need to re-init PMIC since settings are sticky across sysjump */
if (system_jumped_to_this_image())
return;
/*
* Set V085ACNT / V0.85A Control Register:
* Lower power mode = 0.7V.
* Nominal output = 1.0V.
*/
i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x38, 0x7a);
}
DECLARE_HOOK(HOOK_INIT, board_pmic_init, HOOK_PRIO_DEFAULT);
/* Initialize board. */
static void board_init(void)
{
/* Enable PD MCU interrupt */
gpio_enable_interrupt(GPIO_PD_MCU_INT);
/* Enable VBUS interrupt */
gpio_enable_interrupt(GPIO_USB_C0_VBUS_WAKE_L);
gpio_enable_interrupt(GPIO_USB_C1_VBUS_WAKE_L);
/* Enable pericom BC1.2 interrupts */
gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_L);
gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_L);
/* Provide AC status to the PCH */
gpio_set_level(GPIO_PCH_ACOK, extpower_is_present());
}
DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
/**
* Buffer the AC present GPIO to the PCH.
*/
static void board_extpower(void)
{
gpio_set_level(GPIO_PCH_ACOK, extpower_is_present());
}
DECLARE_HOOK(HOOK_AC_CHANGE, board_extpower, HOOK_PRIO_DEFAULT);
/**
* Set active charge port -- only one port can be active at a time.
*
* @param charge_port Charge port to enable.
*
* Returns EC_SUCCESS if charge port is accepted and made active,
* EC_ERROR_* otherwise.
*/
int board_set_active_charge_port(int charge_port)
{
/* charge port is a realy physical port */
int is_real_port = (charge_port >= 0 &&
charge_port < CONFIG_USB_PD_PORT_COUNT);
/* check if we are source vbus on that port */
int source = gpio_get_level(charge_port == 0 ? GPIO_USB_C0_5V_EN :
GPIO_USB_C1_5V_EN);
if (is_real_port && source) {
CPRINTS("Skip enable p%d", charge_port);
return EC_ERROR_INVAL;
}
CPRINTS("New chg p%d", charge_port);
if (charge_port == CHARGE_PORT_NONE) {
/* Disable both ports */
gpio_set_level(GPIO_USB_C0_CHARGE_EN_L, 1);
gpio_set_level(GPIO_USB_C1_CHARGE_EN_L, 1);
} else {
/* Make sure non-charging port is disabled */
gpio_set_level(charge_port ? GPIO_USB_C0_CHARGE_EN_L :
GPIO_USB_C1_CHARGE_EN_L, 1);
/* Enable charging port */
gpio_set_level(charge_port ? GPIO_USB_C1_CHARGE_EN_L :
GPIO_USB_C0_CHARGE_EN_L, 0);
}
return EC_SUCCESS;
}
/**
* Set the charge limit based upon desired maximum.
*
* @param charge_ma Desired charge limit (mA).
*/
void board_set_charge_limit(int charge_ma)
{
charge_set_input_current_limit(MAX(charge_ma,
CONFIG_CHARGER_INPUT_CURRENT));
}
/* Called on AP S5 -> S3 transition */
static void board_chipset_startup(void)
{
gpio_set_level(GPIO_USB1_ENABLE, 1);
gpio_set_level(GPIO_ENABLE_TOUCHPAD, 1);
}
DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT);
/* Called on AP S3 -> S5 transition */
static void board_chipset_shutdown(void)
{
gpio_set_level(GPIO_USB1_ENABLE, 0);
gpio_set_level(GPIO_ENABLE_TOUCHPAD, 0);
}
DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT);
/* Called on AP S3 -> S0 transition */
static void board_chipset_resume(void)
{
gpio_set_level(GPIO_PP1800_DX_AUDIO_EN, 1);
gpio_set_level(GPIO_PP1800_DX_DMIC_EN, 1);
}
DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT);
/* Called on AP S0 -> S3 transition */
static void board_chipset_suspend(void)
{
gpio_set_level(GPIO_PP1800_DX_AUDIO_EN, 0);
gpio_set_level(GPIO_PP1800_DX_DMIC_EN, 0);
}
DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT);
uint32_t board_get_gpio_hibernate_state(uint32_t port, uint32_t pin)
{
int i;
const uint32_t out_low_gpios[][2] = {
/* Turn off LEDs in hibernate */
GPIO_TO_PORT_MASK_PAIR(GPIO_CHARGE_LED_1),
GPIO_TO_PORT_MASK_PAIR(GPIO_CHARGE_LED_2),
/*
* Set PD wake low so that it toggles high to generate a wake
* event once we leave hibernate.
*/
GPIO_TO_PORT_MASK_PAIR(GPIO_USB_PD_WAKE),
};
/* LED GPIOs should be driven low to turn off LEDs */
for (i = 0; i < ARRAY_SIZE(out_low_gpios); ++i)
if (out_low_gpios[i][0] == port && out_low_gpios[i][1] == pin)
return GPIO_OUTPUT | GPIO_LOW;
/* Other GPIOs should be put in a low-power state */
return GPIO_INPUT | GPIO_PULL_UP;
}
/* Make the pmic re-sequence the power rails under these conditions. */
#define PMIC_RESET_FLAGS \
(RESET_FLAG_WATCHDOG | RESET_FLAG_SOFT | RESET_FLAG_HARD)
static void board_handle_reboot(void)
{
int flags;
if (system_jumped_to_this_image())
return;
/* Interrogate current reset flags from previous reboot. */
flags = system_get_reset_flags();
if (!(flags & PMIC_RESET_FLAGS))
return;
/* Preserve AP off request. */
if (flags & RESET_FLAG_AP_OFF)
chip_save_reset_flags(RESET_FLAG_AP_OFF);
ccprintf("Restarting system with PMIC.\n");
/* Flush console */
cflush();
/* Bring down all rails but RTC rail (including EC power). */
gpio_set_level(GPIO_PMIC_LDO_EN, 1);
}
DECLARE_HOOK(HOOK_INIT, board_handle_reboot, HOOK_PRIO_FIRST);

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/* Copyright 2015 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* Chell board configuration */
#ifndef __CROS_EC_BOARD_H
#define __CROS_EC_BOARD_H
/* Optional features */
#define CONFIG_ADC
#define CONFIG_BATTERY_CUT_OFF
#define CONFIG_BATTERY_PRESENT_GPIO GPIO_BAT_PRESENT_L
#define CONFIG_BATTERY_SMART
#define CONFIG_BOARD_VERSION
#define CONFIG_CHARGE_MANAGER
#define CONFIG_CHARGER
#define CONFIG_CHARGER_V2
#define CONFIG_CHARGER_ADC_AMON_BMON
#define CONFIG_CHARGER_DISCHARGE_ON_AC
#define CONFIG_CHARGER_ISL9237
#define CONFIG_CHARGER_ILIM_PIN_DISABLED
#define CONFIG_CHARGER_INPUT_CURRENT 512
#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 1
#define CONFIG_CHARGER_SENSE_RESISTOR 10
#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20
#define CONFIG_CHIPSET_SKYLAKE
#define CONFIG_CLOCK_CRYSTAL
#define CONFIG_EXTPOWER_GPIO
#define CONFIG_HOSTCMD_PD
#define CONFIG_I2C
#define CONFIG_KEYBOARD_PROTOCOL_8042
#define CONFIG_KEYBOARD_COL2_INVERTED
#define CONFIG_LED_COMMON
#define CONFIG_LID_SWITCH
#define CONFIG_LOW_POWER_IDLE
#define CONFIG_PORT80_TASK_EN
#define CONFIG_POWER_BUTTON
#define CONFIG_POWER_BUTTON_X86
#define CONFIG_POWER_COMMON
#define CONFIG_SCI_GPIO GPIO_PCH_SCI_L
#define CONFIG_USB_CHARGER
#define CONFIG_USB_MUX_PS8740
#define CONFIG_USB_POWER_DELIVERY
#define CONFIG_USB_PD_ALT_MODE
#define CONFIG_USB_PD_ALT_MODE_DFP
#define CONFIG_USB_PD_CUSTOM_VDM
#define CONFIG_USB_PD_DUAL_ROLE
#define CONFIG_USB_PD_PORT_COUNT 2
#define CONFIG_USB_PD_TCPM_TCPCI
#define CONFIG_USB_PD_TRY_SRC
#define CONFIG_USB_SWITCH_PI3USB9281
#define CONFIG_USB_SWITCH_PI3USB9281_CHIP_COUNT 2
#define CONFIG_USBC_SS_MUX
#define CONFIG_USBC_SS_MUX_DFP_ONLY
#define CONFIG_USBC_VCONN
#define CONFIG_VBOOT_HASH
#define CONFIG_SPI_FLASH_PORT 1
#define CONFIG_SPI_FLASH
#define CONFIG_FLASH_SIZE 524288
#define CONFIG_SPI_FLASH_W25Q64
#define CONFIG_TEMP_SENSOR
#define CONFIG_TEMP_SENSOR_BD99992GW
#define CONFIG_THERMISTOR_NCP15WB
/*
* Allow dangerous commands.
* TODO: Remove this config before production.
*/
#define CONFIG_SYSTEM_UNLOCKED
#define CONFIG_WATCHDOG_HELP
#define CONFIG_WIRELESS
#define CONFIG_WIRELESS_SUSPEND \
(EC_WIRELESS_SWITCH_WLAN | EC_WIRELESS_SWITCH_WLAN_POWER)
/* Wireless signals */
#define WIRELESS_GPIO_WLAN GPIO_WLAN_OFF_L
#define WIRELESS_GPIO_WLAN_POWER GPIO_PP3300_DX_WLAN_EN
/* LED signals */
#define GPIO_BAT_LED_RED GPIO_CHARGE_LED_1
#define GPIO_BAT_LED_GREEN GPIO_CHARGE_LED_2
/* I2C ports */
#define I2C_PORT_PMIC MEC1322_I2C0_0
#define I2C_PORT_USB_CHARGER_1 MEC1322_I2C0_1
#define I2C_PORT_USB_MUX MEC1322_I2C0_1
#define I2C_PORT_USB_CHARGER_2 MEC1322_I2C0_0
#define I2C_PORT_PD_MCU MEC1322_I2C1
#define I2C_PORT_TCPC MEC1322_I2C1
#define I2C_PORT_BATTERY MEC1322_I2C3
#define I2C_PORT_CHARGER MEC1322_I2C3
/* Thermal sensors read through PMIC ADC interface */
#define I2C_PORT_THERMAL I2C_PORT_PMIC
/* Modules we want to exclude */
#undef CONFIG_CMD_HASH
#undef CONFIG_CMD_I2C_SCAN
#undef CONFIG_CMD_KEYBOARD
#undef CONFIG_CMD_TEMP_SENSOR
#undef CONFIG_CMD_TIMERINFO
#undef CONFIG_CONSOLE_CMDHELP
#undef CONFIG_CONSOLE_HISTORY
#undef DEFERRABLE_MAX_COUNT
#define DEFERRABLE_MAX_COUNT 13
#ifndef __ASSEMBLER__
#include "gpio_signal.h"
#include "registers.h"
/* ADC signal */
enum adc_channel {
ADC_VBUS,
ADC_AMON_BMON,
ADC_PSYS,
/* Number of ADC channels */
ADC_CH_COUNT
};
/* power signal definitions */
enum power_signal {
X86_RSMRST_L_PWRGD = 0,
X86_SLP_S0_DEASSERTED,
X86_SLP_S3_DEASSERTED,
X86_SLP_S4_DEASSERTED,
X86_SLP_SUS_DEASSERTED,
X86_PMIC_DPWROK,
/* Number of X86 signals */
POWER_SIGNAL_COUNT
};
enum temp_sensor_id {
TEMP_SENSOR_BATTERY,
/* These temp sensors are only readable in S0 */
TEMP_SENSOR_AMBIENT,
TEMP_SENSOR_CHARGER,
TEMP_SENSOR_DRAM,
TEMP_SENSOR_WIFI,
TEMP_SENSOR_COUNT
};
/* start as a sink in case we have no other power supply/battery */
#define PD_DEFAULT_STATE PD_STATE_SNK_DISCONNECTED
/* TODO: determine the following board specific type-C power constants */
/*
* delay to turn on the power supply max is ~16ms.
* delay to turn off the power supply max is about ~180ms.
*/
#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */
#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */
/* Define typical operating power and max power */
#define PD_OPERATING_POWER_MW 15000
#define PD_MAX_POWER_MW 45000
#define PD_MAX_CURRENT_MA 3000
/* Try to negotiate to 20V since i2c noise problems should be fixed. */
#define PD_MAX_VOLTAGE_MV 20000
/* Reset PD MCU */
void board_reset_pd_mcu(void);
#endif /* !__ASSEMBLER__ */
#endif /* __CROS_EC_BOARD_H */

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# -*- makefile -*-
# Copyright 2015 The Chromium OS Authors. All rights reserved.
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
#
# Board specific files build
#
# the IC is SMSC MEC1322 / external SPI is 512KB / external clock is crystal
CHIP:=mec1322
CHIP_SPI_SIZE_KB:=512
board-y=board.o led.o
board-$(CONFIG_BATTERY_SMART)+=battery.o
board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o

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/* Copyright 2015 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/*
* List of enabled tasks in the priority order
*
* The first one has the lowest priority.
*
* For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
* TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
* where :
* 'n' in the name of the task
* 'r' in the main routine of the task
* 'd' in an opaque parameter passed to the routine at startup
* 's' is the stack size in bytes; must be a multiple of 8
*/
#define CONFIG_TASK_LIST \
TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_ALWAYS(USB_CHG_P0, usb_charger_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(USB_CHG_P1, usb_charger_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
TASK_NOTEST(PDCMD, pd_command_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_NOTEST(PORT80, port80_task, NULL, TASK_STACK_SIZE)

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/* -*- mode:c -*-
*
* Copyright 2015 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
GPIO_INT(LID_OPEN, PIN(27), GPIO_INT_BOTH | GPIO_PULL_UP, lid_interrupt)
GPIO_INT(AC_PRESENT, PIN(30), GPIO_INT_BOTH, extpower_interrupt)
GPIO_INT(WP_L, PIN(33), GPIO_INT_BOTH, switch_interrupt)
/* Buffered power button input from PMIC / ROP_EC_PWR_BTN_L_R */
GPIO_INT(POWER_BUTTON_L, PIN(35), GPIO_INT_BOTH, power_button_interrupt)
/* RSMRST from PMIC */
GPIO_INT(RSMRST_L_PGOOD, PIN(63), GPIO_INT_BOTH, power_signal_interrupt)
GPIO_INT(PCH_SLP_S4_L, PIN(200), GPIO_INT_BOTH, power_signal_interrupt)
GPIO_INT(PCH_SLP_S3_L, PIN(206), GPIO_INT_BOTH, power_signal_interrupt)
/*
* NOTE: This pulldown should be removed in future hardware once the
* external logic to make SLP_S0 a binary signal to the EC is added.
*/
GPIO_INT(PCH_SLP_S0_L, PIN(211), GPIO_INT_BOTH | GPIO_PULL_DOWN, power_signal_interrupt)
GPIO_INT(PCH_SLP_SUS_L, PIN(12), GPIO_INT_BOTH, power_signal_interrupt)
GPIO_INT(PMIC_INT_L, PIN(50), GPIO_INT_FALLING, power_signal_interrupt)
GPIO_INT(PD_MCU_INT, PIN(122), GPIO_INT_FALLING | GPIO_PULL_UP, pd_mcu_interrupt)
GPIO_INT(USB_C0_VBUS_WAKE_L,PIN(152), GPIO_INT_BOTH, vbus0_evt)
GPIO_INT(USB_C1_VBUS_WAKE_L,PIN(123), GPIO_INT_BOTH, vbus1_evt)
GPIO_INT(USB_C0_BC12_INT_L, PIN(124), GPIO_INT_FALLING, usb0_evt)
GPIO_INT(USB_C1_BC12_INT_L, PIN(145), GPIO_INT_FALLING, usb1_evt)
GPIO_INT(PMIC_DPWROK, PIN(133), GPIO_INT_BOTH, power_signal_interrupt)
GPIO_INT(UART0_RX, PIN(162), GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP, uart_deepsleep_interrupt)
/* PMIC */
GPIO(PMIC_LDO_EN, PIN(55), GPIO_OUT_LOW)
GPIO(PMIC_SLP_SUS_L, PIN(201), GPIO_OUT_LOW)
/* I2C pins - these will be reconfigured for alternate function below */
GPIO(I2C0_0_SCL, PIN(15), GPIO_INPUT)
GPIO(I2C0_0_SDA, PIN(16), GPIO_INPUT)
GPIO(I2C0_1_SCL, PIN(134), GPIO_INPUT)
GPIO(I2C0_1_SDA, PIN(17), GPIO_INPUT)
GPIO(I2C1_SCL, PIN(22), GPIO_INPUT)
GPIO(I2C1_SDA, PIN(23), GPIO_INPUT)
GPIO(I2C2_SCL, PIN(20), GPIO_INPUT)
GPIO(I2C2_SDA, PIN(21), GPIO_INPUT)
GPIO(I2C3_SCL, PIN(24), GPIO_INPUT)
GPIO(I2C3_SDA, PIN(25), GPIO_INPUT)
/* PCH */
GPIO(PCH_SCI_L, PIN(26), GPIO_ODR_HIGH)
GPIO(PCH_SMI_L, PIN(44), GPIO_ODR_HIGH)
GPIO(PCH_PWRBTN_L, PIN(45), GPIO_OUTPUT)
GPIO(PCH_SEC_DISABLE_L, PIN(65), GPIO_OUT_HIGH)
GPIO(PCH_WAKE_L, PIN(66), GPIO_ODR_HIGH)
GPIO(PCH_ACOK, PIN(110), GPIO_OUT_LOW)
GPIO(PCH_RCIN_L, PIN(135), GPIO_ODR_HIGH)
GPIO(PCH_RSMRST_L, PIN(143), GPIO_OUT_LOW)
GPIO(PCH_RTCRST, PIN(163), GPIO_INPUT | GPIO_PULL_UP)
GPIO(SYS_RESET_L, PIN(121), GPIO_ODR_HIGH)
GPIO(ENTERING_RW, PIN(41), GPIO_OUT_LOW)
/* Fan PWM output - NC / testing only */
GPIO(EC_FAN1_TTACH, PIN(105), GPIO_INPUT | GPIO_PULL_UP)
GPIO(EC_FAN1_PWM, PIN(136), GPIO_OUT_LOW)
/* Devices and power */
GPIO(PP1800_DX_DMIC_EN, PIN(11), GPIO_OUT_LOW)
GPIO(PP1800_DX_AUDIO_EN, PIN(141), GPIO_OUT_LOW)
GPIO(PP3300_DX_WLAN_EN, PIN(203), GPIO_OUT_LOW)
GPIO(WLAN_OFF_L, PIN(132), GPIO_OUT_LOW)
GPIO(TRACKPAD_INT_L, PIN(127), GPIO_INPUT)
GPIO(ENABLE_BACKLIGHT, PIN(202), GPIO_OUT_LOW)
GPIO(ENABLE_TOUCHPAD, PIN(53), GPIO_OUT_LOW)
GPIO(PWM_KBLIGHT, PIN(34), GPIO_OUT_LOW)
GPIO(BAT_PRESENT_L, PIN(56), GPIO_INPUT)
GPIO(PLATFORM_EC_PROCHOT, PIN(151), GPIO_INPUT | GPIO_PULL_UP)
GPIO(CPU_PROCHOT, PIN(52), GPIO_OUT_LOW)
/* USB PD and port power */
GPIO(PD_RST_L, PIN(130), GPIO_ODR_HIGH)
GPIO(USB_PD_WAKE, PIN(60), GPIO_OUT_HIGH)
GPIO(USB_C0_DP_HPD, PIN(46), GPIO_OUT_LOW)
GPIO(USB_C1_DP_HPD, PIN(51), GPIO_OUT_LOW)
GPIO(USB_C0_5V_EN, PIN(154), GPIO_OUT_LOW)
GPIO(USB_C1_5V_EN, PIN(204), GPIO_OUT_LOW)
GPIO(USB_C0_CHARGE_EN_L, PIN(64), GPIO_OUT_LOW)
GPIO(USB_C1_CHARGE_EN_L, PIN(210), GPIO_OUT_LOW)
GPIO(USB1_ENABLE, PIN(36), GPIO_OUT_LOW)
GPIO(USB2_OTG_ID, PIN(13), GPIO_ODR_LOW)
GPIO(USB2_OTG_VBUSSENSE, PIN(140), GPIO_OUT_LOW)
/* Board version */
GPIO(BOARD_VERSION1, PIN(6), GPIO_INPUT)
GPIO(BOARD_VERSION2, PIN(7), GPIO_INPUT)
GPIO(BOARD_VERSION3, PIN(10), GPIO_INPUT)
GPIO(KBD_KSO2, PIN(101), GPIO_KB_OUTPUT_COL2)
GPIO(PVT_CS0, PIN(146), GPIO_ODR_HIGH)
/*
* TODO(crosbug.com/p/40848): These LEDs should be under control of the mec1322
* LED control unit. Remove these GPIO definitions once the LED control unit
* is functional.
*/
GPIO(CHARGE_LED_1, PIN(155), GPIO_OUT_LOW)
GPIO(CHARGE_LED_2, PIN(156), GPIO_OUT_LOW)
/* Alternate functions GPIO definitions */
/* GPIO162(UART_RX), GPIO165(UART_TX) */
ALTERNATE(PIN_MASK(16, 0x24), 1, MODULE_UART, 0)
/* KB pins */
/* KB ROW - GPIO000-GPIO005 */
ALTERNATE(PIN_MASK(0, 0x3f), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
/* KB ROW - GPIO100-GPIO104, GPIO106-GPIO107 */
ALTERNATE(PIN_MASK(10, 0xdf), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
/* KB COL - GPIO032 */
ALTERNATE(PIN_MASK(3, 0x04), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
/* KB COL - GPIO040, GPIO42-GPIO43 */
ALTERNATE(PIN_MASK(4, 0x0d), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
/* KB COL - GPIO125-GPIO126 */
ALTERNATE(PIN_MASK(12, 0x60), 2, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
/* KB COL - GPIO142, GPIO144 */
ALTERNATE(PIN_MASK(14, 0x14), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
/* LPC pins */
/* LPC_CLK_RUN_L - GPIO014 */
ALTERNATE(PIN_MASK(1, 0x10), 1, MODULE_LPC, 0)
/* LAD[0:3] - GPIO111-GPIO114, SERIRQ - GPIO115, PCI_CLK - GPIO117 */
ALTERNATE(PIN_MASK(11, 0xbe), 1, MODULE_LPC, 0)
/* LRESET# - GPIO116 */
ALTERNATE(PIN_MASK(11, 0x40), 1, MODULE_LPC, GPIO_INT_BOTH)
/* LFRAME# - GPIO120 */
ALTERNATE(PIN_MASK(12, 0x01), 1, MODULE_LPC, 0)
/* SPI pins */
/* MOSI - GPIO054 */
ALTERNATE(PIN_MASK(5, 0x10), 1, MODULE_SPI, 0)
/* MISO - GPIO164 */
ALTERNATE(PIN_MASK(16, 0x10), 1, MODULE_SPI, 0)
/* PVT_SCLK - GPIO153 */
ALTERNATE(PIN_MASK(15, 0x08), 1, MODULE_SPI, 0)
/* SHD_CS0# - GPIO150. Shared SPI chip select */
ALTERNATE(PIN_MASK(15, 0x00), 1, MODULE_SPI, 0)
/* I2C pins */
/* I2C0_0 CLK - GPIO015, I2C0_0 DAT - GPIO016, I2C0_1 DAT - GPIO017 */
ALTERNATE(PIN_MASK(1, 0xe0), 2, MODULE_I2C, GPIO_ODR_HIGH)
/* I2C{1,2,3} CLK / DAT - GPIO020-GPIO025*/
ALTERNATE(PIN_MASK(2, 0x3f), 2, MODULE_I2C, GPIO_ODR_HIGH)
/* I2C0_1 CLK - GPIO134 */
ALTERNATE(PIN_MASK(13, 0x10), 2, MODULE_I2C, GPIO_ODR_HIGH)
/* ADC pins */
/* ADC1 - GPIO057 / PPVAR_BOOSTIN_SENSE */
ALTERNATE(PIN_MASK(5, 0x80), 1, MODULE_ADC, GPIO_ANALOG)
/* ADC3 - GPIO061 / IADP_ACMON_BMON. ADC4 - GPIO062 / PMON_PSYS */
ALTERNATE(PIN_MASK(6, 0x06), 1, MODULE_ADC, GPIO_ANALOG)
/* LED1 - GPIO155. LED2 - GPIO156 */
ALTERNATE(PIN_MASK(15, 0x60), 2, MODULE_POWER_LED, 0)
/* VCC1_RST# - GPIO131 */
ALTERNATE(PIN_MASK(13, 0x02), 1, MODULE_PMU, 0)
/* nRESET_OUT - GPIO121 */
ALTERNATE(PIN_MASK(12, 0x02), 1, MODULE_PMU, 0)

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/* Copyright 2015 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
* Power and battery LED control.
*/
#include "battery.h"
#include "charge_state.h"
#include "chipset.h"
#include "ec_commands.h"
#include "gpio.h"
#include "hooks.h"
#include "host_command.h"
#include "led_common.h"
#include "util.h"
#define BAT_LED_ON 1
#define BAT_LED_OFF 0
#define CRITICAL_LOW_BATTERY_PERCENTAGE 3
#define LOW_BATTERY_PERCENTAGE 10
#define LED_TOTAL_4SECS_TICKS 16
#define LED_TOTAL_2SECS_TICKS 8
#define LED_ON_1SEC_TICKS 4
#define LED_ON_2SECS_TICKS 8
const enum ec_led_id supported_led_ids[] = {
EC_LED_ID_BATTERY_LED};
const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids);
enum led_color {
LED_OFF = 0,
LED_RED,
LED_AMBER,
LED_GREEN,
LED_COLOR_COUNT /* Number of colors, not a color itself */
};
static int bat_led_set_color(enum led_color color)
{
switch (color) {
case LED_OFF:
gpio_set_level(GPIO_BAT_LED_RED, BAT_LED_OFF);
gpio_set_level(GPIO_BAT_LED_GREEN, BAT_LED_OFF);
break;
case LED_RED:
gpio_set_level(GPIO_BAT_LED_RED, BAT_LED_ON);
gpio_set_level(GPIO_BAT_LED_GREEN, BAT_LED_OFF);
break;
case LED_AMBER:
gpio_set_level(GPIO_BAT_LED_RED, BAT_LED_ON);
gpio_set_level(GPIO_BAT_LED_GREEN, BAT_LED_ON);
break;
case LED_GREEN:
gpio_set_level(GPIO_BAT_LED_RED, BAT_LED_OFF);
gpio_set_level(GPIO_BAT_LED_GREEN, BAT_LED_ON);
break;
default:
return EC_ERROR_UNKNOWN;
}
return EC_SUCCESS;
}
void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range)
{
brightness_range[EC_LED_COLOR_RED] = 1;
brightness_range[EC_LED_COLOR_GREEN] = 1;
}
static int board_led_set_color_battery(enum led_color color)
{
return bat_led_set_color(color);
}
static int board_led_set_color(enum ec_led_id led_id, enum led_color color)
{
int rv;
led_auto_control(led_id, 0);
switch (led_id) {
case EC_LED_ID_BATTERY_LED:
rv = board_led_set_color_battery(color);
break;
default:
return EC_ERROR_UNKNOWN;
}
return rv;
}
int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness)
{
if (brightness[EC_LED_COLOR_RED] != 0 &&
brightness[EC_LED_COLOR_GREEN] != 0)
board_led_set_color(led_id, LED_AMBER);
else if (brightness[EC_LED_COLOR_RED] != 0)
board_led_set_color(led_id, LED_RED);
else if (brightness[EC_LED_COLOR_GREEN] != 0)
board_led_set_color(led_id, LED_GREEN);
else
board_led_set_color(led_id, LED_OFF);
return EC_SUCCESS;
}
static void board_led_set_battery(void)
{
static int battery_ticks;
uint32_t chflags = charge_get_flags();
battery_ticks++;
/* BAT LED behavior:
* Same as the chromeos spec
* Green/Amber for CHARGE_FLAG_FORCE_IDLE
*/
switch (charge_get_state()) {
case PWR_STATE_CHARGE:
board_led_set_color_battery(LED_AMBER);
break;
case PWR_STATE_DISCHARGE:
/* Less than 3%, blink one second every two second */
if (charge_get_percent() < CRITICAL_LOW_BATTERY_PERCENTAGE)
board_led_set_color_battery(
(battery_ticks % LED_TOTAL_2SECS_TICKS <
LED_ON_1SEC_TICKS) ? LED_AMBER : LED_OFF);
/* Less than 10%, blink one second every four seconds */
else if (charge_get_percent() < LOW_BATTERY_PERCENTAGE)
board_led_set_color_battery(
(battery_ticks % LED_TOTAL_4SECS_TICKS <
LED_ON_1SEC_TICKS) ? LED_AMBER : LED_OFF);
else
board_led_set_color_battery(LED_OFF);
break;
case PWR_STATE_ERROR:
board_led_set_color_battery(
(battery_ticks % LED_TOTAL_2SECS_TICKS <
LED_ON_1SEC_TICKS) ? LED_RED : LED_OFF);
break;
case PWR_STATE_CHARGE_NEAR_FULL:
board_led_set_color_battery(LED_GREEN);
break;
case PWR_STATE_IDLE: /* External power connected in IDLE */
if (chflags & CHARGE_FLAG_FORCE_IDLE)
board_led_set_color_battery(
(battery_ticks % LED_TOTAL_4SECS_TICKS <
LED_ON_2SECS_TICKS) ? LED_GREEN : LED_AMBER);
else
board_led_set_color_battery(LED_GREEN);
break;
default:
/* Other states don't alter LED behavior */
break;
}
}
/** * Called by hook task every 1 sec */
static void led_second(void)
{
if (led_auto_control_is_enabled(EC_LED_ID_BATTERY_LED))
board_led_set_battery();
}
DECLARE_HOOK(HOOK_SECOND, led_second, HOOK_PRIO_DEFAULT);

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/* -*- mode:c -*-
*
* Copyright (c) 2015 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
* Minimal set of GPIOs needed for LFW loader
*/
/* SPI PVT chip select */
GPIO(PVT_CS0, PIN(146), GPIO_ODR_HIGH)
/* Alternate functions GPIO definition */
/* UART */
ALTERNATE(PIN_MASK(16, 0x24), 1, MODULE_UART, 0)
/* SPI pins */
ALTERNATE(PIN_MASK(5, 0x10), 1, MODULE_SPI, 0)
ALTERNATE(PIN_MASK(16, 0x10), 1, MODULE_SPI, 0)
ALTERNATE(PIN_MASK(15, 0x08), 1, MODULE_SPI, 0)

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board/chell/usb_pd_policy.c Normal file
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/* Copyright 2015 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#include "atomic.h"
#include "charge_manager.h"
#include "common.h"
#include "console.h"
#include "gpio.h"
#include "hooks.h"
#include "host_command.h"
#include "registers.h"
#include "system.h"
#include "task.h"
#include "timer.h"
#include "util.h"
#include "usb_mux.h"
#include "usb_pd.h"
#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\
PDO_FIXED_COMM_CAP)
/* TODO: fill in correct source and sink capabilities */
const uint32_t pd_src_pdo[] = {
PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS),
};
const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo);
const uint32_t pd_snk_pdo[] = {
PDO_FIXED(5000, 500, PDO_FIXED_FLAGS),
PDO_BATT(5000, 20000, 15000),
PDO_VAR(5000, 20000, 3000),
};
const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo);
int pd_is_valid_input_voltage(int mv)
{
return 1;
}
int pd_check_requested_voltage(uint32_t rdo)
{
int max_ma = rdo & 0x3FF;
int op_ma = (rdo >> 10) & 0x3FF;
int idx = rdo >> 28;
uint32_t pdo;
uint32_t pdo_ma;
if (!idx || idx > pd_src_pdo_cnt)
return EC_ERROR_INVAL; /* Invalid index */
/* check current ... */
pdo = pd_src_pdo[idx - 1];
pdo_ma = (pdo & 0x3ff);
if (op_ma > pdo_ma)
return EC_ERROR_INVAL; /* too much op current */
if (max_ma > pdo_ma)
return EC_ERROR_INVAL; /* too much max current */
CPRINTF("Requested %d V %d mA (for %d/%d mA)\n",
((pdo >> 10) & 0x3ff) * 50, (pdo & 0x3ff) * 10,
((rdo >> 10) & 0x3ff) * 10, (rdo & 0x3ff) * 10);
return EC_SUCCESS;
}
void pd_transition_voltage(int idx)
{
/* No-operation: we are always 5V */
}
int pd_set_power_supply_ready(int port)
{
/* Disable charging */
gpio_set_level(port ? GPIO_USB_C1_CHARGE_EN_L :
GPIO_USB_C0_CHARGE_EN_L, 1);
/* Provide VBUS */
gpio_set_level(port ? GPIO_USB_C1_5V_EN :
GPIO_USB_C0_5V_EN, 1);
return EC_SUCCESS; /* we are ready */
}
void pd_power_supply_reset(int port)
{
/* Disable VBUS */
gpio_set_level(port ? GPIO_USB_C1_5V_EN :
GPIO_USB_C0_5V_EN, 0);
/* notify host of power info change */
pd_send_host_event(PD_EVENT_POWER_CHANGE);
}
void pd_set_input_current_limit(int port, uint32_t max_ma,
uint32_t supply_voltage)
{
#ifdef CONFIG_CHARGE_MANAGER
struct charge_port_info charge;
charge.current = max_ma;
charge.voltage = supply_voltage;
charge_manager_update_charge(CHARGE_SUPPLIER_PD, port, &charge);
#endif
/* notify host of power info change */
}
void typec_set_input_current_limit(int port, uint32_t max_ma,
uint32_t supply_voltage)
{
#ifdef CONFIG_CHARGE_MANAGER
struct charge_port_info charge;
charge.current = max_ma;
charge.voltage = supply_voltage;
charge_manager_update_charge(CHARGE_SUPPLIER_TYPEC, port, &charge);
#endif
/* notify host of power info change */
}
int pd_snk_is_vbus_provided(int port)
{
return !gpio_get_level(port ? GPIO_USB_C1_VBUS_WAKE_L :
GPIO_USB_C0_VBUS_WAKE_L);
}
int pd_board_checks(void)
{
return EC_SUCCESS;
}
int pd_check_power_swap(int port)
{
/*
* Allow power swap as long as we are acting as a dual role device,
* otherwise assume our role is fixed (not in S0 or console command
* to fix our role).
*/
return pd_get_dual_role() == PD_DRP_TOGGLE_ON ? 1 : 0;
}
int pd_check_data_swap(int port, int data_role)
{
/* Allow data swap if we are a UFP, otherwise don't allow */
return (data_role == PD_ROLE_UFP) ? 1 : 0;
}
void pd_execute_data_swap(int port, int data_role)
{
/* Do nothing */
}
void pd_check_pr_role(int port, int pr_role, int flags)
{
/*
* If partner is dual-role power and dualrole toggling is on, consider
* if a power swap is necessary.
*/
if ((flags & PD_FLAGS_PARTNER_DR_POWER) &&
pd_get_dual_role() == PD_DRP_TOGGLE_ON) {
/*
* If we are a sink and partner is not externally powered, then
* swap to become a source. If we are source and partner is
* externally powered, swap to become a sink.
*/
int partner_extpower = flags & PD_FLAGS_PARTNER_EXTPOWER;
if ((!partner_extpower && pr_role == PD_ROLE_SINK) ||
(partner_extpower && pr_role == PD_ROLE_SOURCE))
pd_request_power_swap(port);
}
}
void pd_check_dr_role(int port, int dr_role, int flags)
{
/* If UFP, try to switch to DFP */
if ((flags & PD_FLAGS_PARTNER_DR_DATA) && dr_role == PD_ROLE_UFP)
pd_request_data_swap(port);
}
/* ----------------- Vendor Defined Messages ------------------ */
const struct svdm_response svdm_rsp = {
.identity = NULL,
.svids = NULL,
.modes = NULL,
};
int pd_custom_vdm(int port, int cnt, uint32_t *payload,
uint32_t **rpayload)
{
int cmd = PD_VDO_CMD(payload[0]);
uint16_t dev_id = 0;
int is_rw;
/* make sure we have some payload */
if (cnt == 0)
return 0;
switch (cmd) {
case VDO_CMD_VERSION:
/* guarantee last byte of payload is null character */
*(payload + cnt - 1) = 0;
CPRINTF("version: %s\n", (char *)(payload+1));
break;
case VDO_CMD_READ_INFO:
case VDO_CMD_SEND_INFO:
/* copy hash */
if (cnt == 7) {
dev_id = VDO_INFO_HW_DEV_ID(payload[6]);
is_rw = VDO_INFO_IS_RW(payload[6]);
CPRINTF("DevId:%d.%d SW:%d RW:%d\n",
HW_DEV_ID_MAJ(dev_id),
HW_DEV_ID_MIN(dev_id),
VDO_INFO_SW_DBG_VER(payload[6]),
is_rw);
} else if (cnt == 6) {
/* really old devices don't have last byte */
pd_dev_store_rw_hash(port, dev_id, payload + 1,
SYSTEM_IMAGE_UNKNOWN);
}
break;
case VDO_CMD_CURRENT:
CPRINTF("Current: %dmA\n", payload[1]);
break;
case VDO_CMD_FLIP:
usb_mux_flip(port);
break;
#ifdef CONFIG_USB_PD_LOGGING
case VDO_CMD_GET_LOG:
pd_log_recv_vdm(port, cnt, payload);
break;
#endif /* CONFIG_USB_PD_LOGGING */
}
return 0;
}
#ifdef CONFIG_USB_PD_ALT_MODE_DFP
static int dp_flags[CONFIG_USB_PD_PORT_COUNT];
/* DP Status VDM as returned by UFP */
static uint32_t dp_status[CONFIG_USB_PD_PORT_COUNT];
static void svdm_safe_dp_mode(int port)
{
/* make DP interface safe until configure */
dp_flags[port] = 0;
dp_status[port] = 0;
usb_mux_set(port, TYPEC_MUX_NONE,
USB_SWITCH_CONNECT, pd_get_polarity(port));
}
static int svdm_enter_dp_mode(int port, uint32_t mode_caps)
{
/* Only enter mode if device is DFP_D capable */
if (mode_caps & MODE_DP_SNK) {
svdm_safe_dp_mode(port);
return 0;
}
return -1;
}
static int svdm_dp_status(int port, uint32_t *payload)
{
int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT);
payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
CMD_DP_STATUS | VDO_OPOS(opos));
payload[1] = VDO_DP_STATUS(0, /* HPD IRQ ... not applicable */
0, /* HPD level ... not applicable */
0, /* exit DP? ... no */
0, /* usb mode? ... no */
0, /* multi-function ... no */
(!!(dp_flags[port] & DP_FLAGS_DP_ON)),
0, /* power low? ... no */
(!!(dp_flags[port] & DP_FLAGS_DP_ON)));
return 2;
};
static int svdm_dp_config(int port, uint32_t *payload)
{
int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT);
int mf_pref = PD_VDO_DPSTS_MF_PREF(dp_status[port]);
int pin_mode = pd_dfp_dp_get_pin_mode(port, dp_status[port]);
if (!pin_mode)
return 0;
usb_mux_set(port, mf_pref ? TYPEC_MUX_DOCK : TYPEC_MUX_DP,
USB_SWITCH_CONNECT, pd_get_polarity(port));
payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
CMD_DP_CONFIG | VDO_OPOS(opos));
payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */
1, /* DPv1.3 signaling */
2); /* UFP connected */
return 2;
};
#define PORT_TO_HPD(port) ((port) ? GPIO_USB_C1_DP_HPD : GPIO_USB_C0_DP_HPD)
static void svdm_dp_post_config(int port)
{
dp_flags[port] |= DP_FLAGS_DP_ON;
if (!(dp_flags[port] & DP_FLAGS_HPD_HI_PENDING))
return;
gpio_set_level(PORT_TO_HPD(port), 1);
}
static void hpd0_irq_deferred(void)
{
gpio_set_level(GPIO_USB_C0_DP_HPD, 1);
}
static void hpd1_irq_deferred(void)
{
gpio_set_level(GPIO_USB_C1_DP_HPD, 1);
}
DECLARE_DEFERRED(hpd0_irq_deferred);
DECLARE_DEFERRED(hpd1_irq_deferred);
#define PORT_TO_HPD_IRQ_DEFERRED(port) ((port) ? hpd1_irq_deferred : \
hpd0_irq_deferred)
static int svdm_dp_attention(int port, uint32_t *payload)
{
int cur_lvl;
int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]);
int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]);
enum gpio_signal hpd = PORT_TO_HPD(port);
cur_lvl = gpio_get_level(hpd);
dp_status[port] = payload[1];
/* Its initial DP status message prior to config */
if (!(dp_flags[port] & DP_FLAGS_DP_ON)) {
if (lvl)
dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING;
return 1;
}
if (irq & cur_lvl) {
gpio_set_level(hpd, 0);
hook_call_deferred(PORT_TO_HPD_IRQ_DEFERRED(port),
HPD_DSTREAM_DEBOUNCE_IRQ);
} else if (irq & !cur_lvl) {
CPRINTF("ERR:HPD:IRQ&LOW\n");
return 0; /* nak */
} else {
gpio_set_level(hpd, lvl);
}
/* ack */
return 1;
}
static void svdm_exit_dp_mode(int port)
{
svdm_safe_dp_mode(port);
gpio_set_level(PORT_TO_HPD(port), 0);
}
static int svdm_enter_gfu_mode(int port, uint32_t mode_caps)
{
/* Always enter GFU mode */
return 0;
}
static void svdm_exit_gfu_mode(int port)
{
}
static int svdm_gfu_status(int port, uint32_t *payload)
{
/*
* This is called after enter mode is successful, send unstructured
* VDM to read info.
*/
pd_send_vdm(port, USB_VID_GOOGLE, VDO_CMD_READ_INFO, NULL, 0);
return 0;
}
static int svdm_gfu_config(int port, uint32_t *payload)
{
return 0;
}
static int svdm_gfu_attention(int port, uint32_t *payload)
{
return 0;
}
const struct svdm_amode_fx supported_modes[] = {
{
.svid = USB_SID_DISPLAYPORT,
.enter = &svdm_enter_dp_mode,
.status = &svdm_dp_status,
.config = &svdm_dp_config,
.post_config = &svdm_dp_post_config,
.attention = &svdm_dp_attention,
.exit = &svdm_exit_dp_mode,
},
{
.svid = USB_VID_GOOGLE,
.enter = &svdm_enter_gfu_mode,
.status = &svdm_gfu_status,
.config = &svdm_gfu_config,
.attention = &svdm_gfu_attention,
.exit = &svdm_exit_gfu_mode,
}
};
const int supported_modes_cnt = ARRAY_SIZE(supported_modes);
#endif /* CONFIG_USB_PD_ALT_MODE_DFP */

1
board/chell_pd Symbolic link
View File

@@ -0,0 +1 @@
glados_pd/

1
test/build.mk
View File

@@ -27,6 +27,7 @@ test-list-$(BOARD_LLAMA)=
# For some tests, we are running out of RAM. Disable them for now.
test-list-$(BOARD_GLADOS_PD)=
test-list-$(BOARD_CHELL_PD)=
test-list-$(BOARD_OAK_PD)=
test-list-$(BOARD_SAMUS_PD)=