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Fixup for coreboot & portability.

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Removed include for sha1 and just hardcoded the #define for now.

BRANCH=none
BUG=chrome-os-partner:32108
TEST=manual,
can compile EC & BIOS firmware for samus

Change-Id: Iab03315041ec9ac12e85ca93f97b80b850c61377
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/218809
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This commit is contained in:
Todd Broch
2014-09-18 10:19:43 -07:00
committed by chrome-internal-fetch
parent 271bc1eae6
commit 85063ee72d
1 changed files with 5 additions and 5 deletions
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10
include/ec_commands.h
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@@ -2,7 +2,6 @@
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#include "sha1.h"
/* Host communication command constants for Chrome EC */
@@ -2559,8 +2558,6 @@ struct ec_params_reboot_ec {
*/
#define EC_CMD_VERSION0 0xdc
#endif /* !__ACPI__ */
/*****************************************************************************/
/*
* PD commands
@@ -2639,12 +2636,12 @@ struct ec_params_usb_pd_fw_update {
/* Write USB-PD Accessory RW_HASH table entry */
#define EC_CMD_USB_PD_RW_HASH_ENTRY 0x111
#define SHA1_DIGEST_SIZE 20
struct ec_params_usb_pd_rw_hash_entry {
uint8_t dev_id;
union {
uint8_t b[SHA1_DIGEST_SIZE];
uint32_t w[DIV_ROUND_UP(SHA1_DIGEST_SIZE, sizeof(uint32_t))];
uint32_t w[SHA1_DIGEST_SIZE/4];
} dev_rw_hash;
} __packed;
@@ -2654,6 +2651,9 @@ struct ec_params_usb_pd_rw_hash_entry {
struct ec_params_usb_pd_info_request {
uint8_t port;
} __packed;
#endif /* !__ACPI__ */
/*****************************************************************************/
/*
* Passthru commands