Initial Glower commit

The first commit for the Glower board.

BRANCH=None
BUG=chrome-os-partner:35308
TEST=Boot on Glower and check console is responsive.

Change-Id: I73bc60b8d54b3c570f0822824ad9a66e0fe467a1
Signed-off-by: Vic Yang <victoryang@google.com>
Reviewed-on: https://chromium-review.googlesource.com/239257
Tested-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vic Yang <victoryang@chromium.org>
This commit is contained in:
Vic Yang
2015-01-07 16:14:10 -08:00
committed by ChromeOS Commit Bot
parent 815cb84866
commit 8a5c38420b
7 changed files with 297 additions and 0 deletions

1
board/glower/Makefile Symbolic link
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../../Makefile

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board/glower/board.c Normal file
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/* Copyright 2015 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* Glower board-specific configuration */
#include "charger.h"
#include "extpower.h"
#include "gpio.h"
#include "i2c.h"
#include "lid_switch.h"
#include "power.h"
#include "power_button.h"
#include "registers.h"
#include "switch.h"
#include "util.h"
#define GPIO_KB_INPUT GPIO_INPUT
#define GPIO_KB_OUTPUT (GPIO_ODR_HIGH | GPIO_PULL_UP)
#include "gpio_list.h"
/* power signal list. Must match order of enum power_signal. */
const struct power_signal_info power_signal_list[] = {
{GPIO_PP1050_PGOOD, 1, "PGOOD_PP1050"},
{GPIO_PP3300_PCH_PGOOD, 1, "PGOOD_PP3300_PCH"},
{GPIO_PP5000_PGOOD, 1, "PGOOD_PP5000"},
{GPIO_S5_PGOOD, 1, "PGOOD_S5"},
{GPIO_VCORE_PGOOD, 1, "PGOOD_VCORE"},
{GPIO_PP1000_S0IX_PGOOD, 1, "PGOOD_PP1000_S0IX"},
{GPIO_PCH_SLP_S3_L, 1, "SLP_S3#_DEASSERTED"},
{GPIO_PCH_SLP_S4_L, 1, "SLP_S4#_DEASSERTED"},
#ifdef CONFIG_CHIPSET_DEBUG
{GPIO_PCH_SLP_SX_L, 1, "SLP_SX#_DEASSERTED"},
{GPIO_PCH_SUS_STAT_L, 0, "SUS_STAT#_ASSERTED"},
{GPIO_PCH_SUSPWRDNACK, 1, "SUSPWRDNACK_ASSERTED"},
#endif
};
BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
/* I2C ports */
const struct i2c_port_t i2c_ports[] = {
{"batt_chg", 1, 100},
{"thermal", 2, 100},
};
const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
/**
* Discharge battery when on AC power for factory test.
*/
int board_discharge_on_ac(int enable)
{
return charger_discharge_on_ac(enable);
}

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/* Copyright 2015 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* Glower board configuration */
#ifndef __BOARD_H
#define __BOARD_H
/* Optional features */
/* #define CONFIG_BACKLIGHT_LID */
/* #define CONFIG_BATTERY_SMART */
#define CONFIG_BOARD_VERSION
#if 0
#define CONFIG_CHARGER
#define CONFIG_CHARGER_V1
#define CONFIG_CHARGER_BQ24715
#define CONFIG_CHARGER_DISCHARGE_ON_AC
#define CONFIG_CHARGER_INPUT_CURRENT 1700 /* 33 W adapter, 19 V, 1.75 A */
#define CONFIG_CHARGER_SENSE_RESISTOR 10 /* Charge sense resistor, mOhm */
#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 /* Input senso resistor, mOhm */
#endif
#define CONFIG_CHIPSET_BAYTRAIL
#define CONFIG_CHIPSET_CAN_THROTTLE
#define CONFIG_POWER_COMMON
/* #define CONFIG_CMD_GSV */
#define CONFIG_EXTPOWER_GPIO
#define CONFIG_I2C_PASSTHRU_RESTRICTED
#define CONFIG_KEYBOARD_COL2_INVERTED
#define CONFIG_KEYBOARD_IRQ_GPIO GPIO_KBD_IRQ_L
#define CONFIG_KEYBOARD_PROTOCOL_8042
/* #define CONFIG_LED_COMMON */
#define CONFIG_POWER_BUTTON
#define CONFIG_POWER_BUTTON_X86
#define CONFIG_USB_PORT_POWER_IN_S3
#define CONFIG_USB_PORT_POWER_SMART
#define CONFIG_USB_PORT_POWER_SMART_SIMPLE
/* #define CONFIG_VBOOT_HASH */
/*
#define CONFIG_WIRELESS
#define CONFIG_WIRELESS_SUSPEND \
(EC_WIRELESS_SWITCH_WLAN | EC_WIRELESS_SWITCH_WLAN_POWER)
*/
#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands */
#define CONFIG_WATCHDOG_HELP
#define CONFIG_CLOCK_CRYSTAL
#define CONFIG_WAKE_PIN GPIO_POWER_BUTTON_L
#define CONFIG_SPI_PORT 1
#define CONFIG_SPI_CS_GPIO GPIO_PVT_CS0
#undef CONFIG_CONSOLE_CMDHELP
#undef CONFIG_TASK_PROFILING
/* Modules we want to exclude */
#undef CONFIG_ADC
#undef CONFIG_EEPROM
#undef CONFIG_EOPTION
#undef CONFIG_PECI
#undef CONFIG_PSTORE
#undef CONFIG_PWM
#ifndef __ASSEMBLER__
/* I2C ports */
#define I2C_PORT_BATTERY 1
#define I2C_PORT_CHARGER 1
#define I2C_PORT_THERMAL 2
/* USB ports */
#define USB_PORT_COUNT 2
/* Wireless signals */
#define WIRELESS_GPIO_WLAN GPIO_WLAN_OFF_L
#define WIRELESS_GPIO_WWAN GPIO_PP3300_LTE_EN
#define WIRELESS_GPIO_WLAN_POWER GPIO_PP3300_WLAN_EN
#include "gpio_signal.h"
/* power signal definitions */
enum power_signal {
X86_PGOOD_PP1050 = 0,
X86_PGOOD_PP3300_PCH,
X86_PGOOD_PP5000,
X86_PGOOD_S5,
X86_PGOOD_VCORE,
X86_PGOOD_PP1000_S0IX,
X86_SLP_S3_DEASSERTED,
X86_SLP_S4_DEASSERTED,
#ifdef CONFIG_CHIPSET_DEBUG
X86_SLP_SX_DEASSERTED,
X86_SUS_STAT_ASSERTED,
X86_SUSPWRDNACK_ASSERTED,
#endif
/* Number of X86 signals */
POWER_SIGNAL_COUNT
};
/* Discharge battery when on AC power for factory test. */
int board_discharge_on_ac(int enable);
#endif /* !__ASSEMBLER__ */
#endif /* __BOARD_H */

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# -*- makefile -*-
# Copyright 2015 The Chromium OS Authors. All rights reserved.
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
#
# Board specific files build
#
# the IC is Microchip MEC1322
CHIP:=mec1322
CHIP_SPI_SIZE_KB:=512
board-y=board.o
# As this file is read more than once, must put the rules
# elsewhere (Makefile.rules) and just use variable to trigger them
PROJECT_EXTRA+=${out}/ec.spi.bin

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/* Copyright 2015 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/**
* List of enabled tasks in the priority order
*
* The first one has the lowest priority.
*
* For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
* TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
* where :
* 'n' in the name of the task
* 'r' in the main routine of the task
* 'd' in an opaque parameter passed to the routine at startup
* 's' is the stack size in bytes; must be a multiple of 8
*/
#define CONFIG_TASK_LIST \
TASK_ALWAYS(HOOKS, hook_task, NULL, TASK_STACK_SIZE) \
/* TASK_ALWAYS(CHARGER, charger_task, NULL, TASK_STACK_SIZE) */ \
TASK_NOTEST(CHIPSET, chipset_task, NULL, TASK_STACK_SIZE) \
TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(POWERBTN, power_button_task, NULL, TASK_STACK_SIZE) \
TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE)

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/* -*- mode:c -*-
*
* Copyright 2015 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* Inputs with interrupt handlers are first for efficiency */
GPIO(POWER_BUTTON_L, PORT(20), 3, GPIO_INT_BOTH, power_button_interrupt)
GPIO(LID_OPEN, PORT(16), 0, GPIO_INT_BOTH, lid_interrupt)
GPIO(AC_PRESENT, PORT(16), 3, GPIO_INT_BOTH, extpower_interrupt)
GPIO(PCH_SLP_S3_L, PORT(20), 4, GPIO_INT_BOTH | GPIO_PULL_UP, power_signal_interrupt) /* SLP_S3# signal from PCH */
GPIO(PCH_SLP_S4_L, PORT(21), 0, GPIO_INT_BOTH | GPIO_PULL_UP, power_signal_interrupt) /* SLP_S4# signal from PCH */
GPIO(PP1050_PGOOD, PORT(13), 3, GPIO_INT_BOTH, power_signal_interrupt) /* Power good on 1.05V */
GPIO(PP3300_PCH_PGOOD, PORT(4), 4, GPIO_INT_BOTH, power_signal_interrupt) /* Power good on 3.3V (PCH supply) */
GPIO(PP5000_PGOOD, PORT(3), 0, GPIO_INT_BOTH, power_signal_interrupt) /* Power good on 5V */
GPIO(S5_PGOOD, PORT(6), 2, GPIO_INT_BOTH, power_signal_interrupt) /* Power good on S5 supplies */
GPIO(VCORE_PGOOD, PORT(5), 7, GPIO_INT_BOTH, power_signal_interrupt) /* Power good on core VR */
GPIO(WP_L, PORT(1), 2, GPIO_INT_BOTH, switch_interrupt) /* Write protect input */
/* Other inputs */
GPIO(BOARD_VERSION1, PORT(0), 6, GPIO_INPUT, NULL)
GPIO(BOARD_VERSION2, PORT(12), 3, GPIO_INPUT, NULL)
GPIO(BOARD_VERSION3, PORT(12), 7, GPIO_INPUT, NULL)
#ifdef CONFIG_CHIPSET_DEBUG
GPIO(PCH_SLP_SX_L, PORT(21), 1, GPIO_INPUT | GPIO_PULL_UP, NULL)
GPIO(PCH_SUS_STAT_L, PORT(20), 1, GPIO_INPUT | GPIO_PULL_UP, NULL)
GPIO(PCH_SUSPWRDNACK, PORT(4), 6, GPIO_INPUT | GPIO_PULL_UP, NULL)
#endif
GPIO(PP1000_S0IX_PGOOD, PORT(3), 5, GPIO_INPUT, NULL)
GPIO(USB1_OC_L, PORT(13), 4, GPIO_INPUT, NULL)
GPIO(USB2_OC_L, PORT(1), 6, GPIO_INPUT, NULL)
/* Outputs; all unasserted by default except for reset signals */
GPIO(CPU_PROCHOT, PORT(14), 5, GPIO_OUT_LOW, NULL) /* Force CPU to think it's overheated */
GPIO(ENABLE_BACKLIGHT, PORT(20), 0, GPIO_ODR_HIGH, NULL) /* Enable backlight power */
GPIO(ENABLE_TOUCHPAD, PORT(6), 4, GPIO_OUT_LOW, NULL) /* Enable touchpad power */
GPIO(ENTERING_RW, PORT(3), 3, GPIO_OUT_LOW, NULL) /* Indicate when EC is entering RW code */
GPIO(LPC_CLKRUN_L, PORT(1), 4, GPIO_ODR_HIGH, NULL) /* Request that PCH drive LPC clock */
GPIO(PCH_CORE_PWROK, PORT(12), 2, GPIO_OUT_LOW, NULL) /* Indicate core well power is stable */
GPIO(PCH_PWRBTN_L, PORT(13), 0, GPIO_ODR_HIGH, NULL) /* Power button output to PCH */
GPIO(PCH_RCIN_L, PORT(14), 0, GPIO_ODR_HIGH, NULL) /* Reset line to PCH (for 8042 emulation) */
GPIO(PCH_RSMRST_L, PORT(14), 3, GPIO_OUT_LOW, NULL) /* Reset PCH resume power plane logic */
GPIO(PCH_SMI_L, PORT(5), 5, GPIO_ODR_HIGH, NULL) /* System management interrupt to PCH */
GPIO(PCH_SOC_OVERRIDE_L, PORT(6), 5, GPIO_OUT_LOW, NULL) /* SOC override signal to PCH; when high, ME ignores security descriptor */
GPIO(PCH_SYS_PWROK, PORT(12), 4, GPIO_OUT_LOW, NULL) /* EC thinks everything is up and ready */
GPIO(PCH_WAKE_L, PORT(20), 2, GPIO_ODR_HIGH, NULL) /* Wake signal from EC to PCH */
GPIO(PP1350_EN, PORT(14), 7, GPIO_OUT_LOW, NULL) /* Enable 1.35V supply */
GPIO(PP3300_DX_EN, PORT(5), 0, GPIO_OUT_LOW, NULL) /* Enable power to lots of peripherals */
GPIO(PP3300_LTE_EN, PORT(1), 1, GPIO_OUT_LOW, NULL) /* Enable LTE radio */
GPIO(PP3300_WLAN_EN, PORT(4), 7, GPIO_OUT_LOW, NULL) /* Enable WiFi power */
GPIO(PP5000_EN, PORT(2), 7, GPIO_OUT_LOW, NULL) /* Enable 5V supply */
GPIO(PPSX_EN, PORT(5), 3, GPIO_INPUT, NULL) /* Enable PP1350_PCH_SX, PP1000_PCH_SX */
GPIO(SUSP_VR_EN, PORT(6), 6, GPIO_OUT_LOW, NULL) /* Enable 1.05V regulator */
GPIO(TOUCHSCREEN_RESET_L, PORT(16), 1, GPIO_OUT_HIGH, NULL) /* Reset touch screen */
GPIO(USB_CTL1, PORT(15), 7, GPIO_OUT_LOW, NULL) /* USB control signal 1 to both ports */
GPIO(USB_ILIM_SEL, PORT(3), 6, GPIO_OUT_LOW, NULL) /* USB current limit to both ports */
GPIO(USB1_ENABLE, PORT(1), 5, GPIO_OUT_LOW, NULL) /* USB port 1 output power enable */
GPIO(USB2_ENABLE, PORT(1), 7, GPIO_OUT_LOW, NULL) /* USB port 2 output power enable */
GPIO(VCORE_EN, PORT(15), 0, GPIO_OUT_LOW, NULL) /* Enable core power supplies */
GPIO(WLAN_OFF_L, PORT(5), 2, GPIO_OUT_LOW, NULL) /* Disable WiFi radio */
GPIO(KBD_IRQ_L, PORT(6), 7, GPIO_ODR_HIGH, NULL) /* Negative edge triggered irq. */
GPIO(BAT_LED0, PORT(15), 4, GPIO_ODR_HIGH, NULL)
GPIO(BAT_LED1, PORT(15), 5, GPIO_ODR_HIGH, NULL)
GPIO(KBD_KSO2, PORT(10), 1, GPIO_OUT_LOW, NULL)
GPIO(SYS_RST_L, PORT(12), 1, GPIO_INPUT, NULL)
GPIO(EC_HIB, PORT(3), 4, GPIO_INPUT, NULL)
GPIO(ICMNT, PORT(6), 1, GPIO_INPUT, NULL)
GPIO(PVT_CS0, PORT(14), 6, GPIO_ODR_HIGH, NULL)
ALTERNATE(PORT(16), 0x24, 1, MODULE_UART, 0) /* UART0 */
ALTERNATE(PORT(2), 0x0f, 2, MODULE_I2C, 0) /* I2C1 and I2C2 */
ALTERNATE(PORT(0), 0xfe, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
ALTERNATE(PORT(1), 0x03, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
ALTERNATE(PORT(3), 0x04, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
ALTERNATE(PORT(4), 0x0d, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
ALTERNATE(PORT(10), 0xd8, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
ALTERNATE(PORT(12), 0x60, 2, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
ALTERNATE(PORT(14), 0x14, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
ALTERNATE(PORT(2), 0x40, 2, MODULE_LPC, 0) /* LPC SCI */
ALTERNATE(PORT(15), 0x08, 1, MODULE_SPI, 0)
ALTERNATE(PORT(16), 0x10, 1, MODULE_SPI, 0)
ALTERNATE(PORT(5), 0x10, 1, MODULE_SPI, 0)

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@@ -20,6 +20,10 @@ enum wireless_power_state {
/**
* Set wireless power state.
*/
#ifdef CONFIG_WIRELESS
void wireless_set_state(enum wireless_power_state state);
#else
static inline void wireless_set_state(enum wireless_power_state state) { }
#endif
#endif /* __CROS_EC_WIRELESS_H */