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zinger: activate the watchdog.

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Ensure we are never stuck somewhere without doing the safety checks by
enabling the watchdog and reloading it in the safaty checks function.

I have kept the default timing constants, so on STM32F0xx the watchdog
period should be between 1.2s (LSI at 30kHz) and 2.0s (LSI at 50kHz).

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=none
TEST=add a 2s loop in the serial port interrupt handler and see the
power supply rebooting.

Change-Id: I000f2a36a31e1166adf63a36c2b7f52999adc928
Reviewed-on: https://chromium-review.googlesource.com/201575
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
This commit is contained in:
Vincent Palatin
2014-05-27 10:45:32 -07:00
committed by chrome-internal-fetch
parent f4de7fb005
commit 8c89bcff4d
2 changed files with 5 additions and 0 deletions
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2
board/zinger/hardware.c
View File

@@ -13,6 +13,7 @@
#include "task.h"
#include "timer.h"
#include "util.h"
#include "watchdog.h"
static void clock_init(void)
{
@@ -164,6 +165,7 @@ void hardware_init(void)
pins_init();
uart_init();
timers_init();
watchdog_init();
adc_init();
irq_init();
}

3
board/zinger/usb_pd_policy.c
View File

@@ -186,6 +186,9 @@ int pd_board_checks(void)
int vbus_volt, vbus_amp;
int watchdog_enabled = STM32_ADC_CFGR1 & (1 << 23);
/* Reload the watchdog */
STM32_IWDG_KR = STM32_IWDG_KR_RELOAD;
if (watchdog_enabled)
/* if the watchdog is enabled, stop it to do other readings */
adc_disable_watchdog();