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rambi: Enable PP5000 at boot

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Due to power topology, PP5000 needs to be enabled as soon after
PP3300_DSW as possible.  Since PP3300_DSW is what powers the EC, the
EC needs to turn on PP5000 by default and leave it on.

BUG=chrome-os-partner:23673
BRANCH=none
TEST=reboot ap-off (this boots the EC without doing AP power sequencing)
     gpioget -> shows PP5000_EN=1, PP5000_GOOD=1

Change-Id: I5d493877d330b2543a493f8a2f3411003d5964ca
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174989
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Randall Spangler
2013-10-29 11:30:50 -07:00
committed by chrome-internal-fetch
parent 497e292542
commit 8eacb8ffe2
2 changed files with 19 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
board/rambi/board.c
View File

@@ -86,7 +86,11 @@ const struct gpio_info gpio_list[] = {
{"PP3300_DX_EN", LM4_GPIO_J, (1<<2), GPIO_OUT_LOW, NULL},
{"PP3300_LTE_EN", LM4_GPIO_D, (1<<2), GPIO_OUT_LOW, NULL},
{"PP3300_WLAN_EN", LM4_GPIO_J, (1<<0), GPIO_OUT_LOW, NULL},
{"PP5000_EN", LM4_GPIO_H, (1<<7), GPIO_OUT_LOW, NULL},
/*
* TODO(crosbug.com/p/23673): PP5000_EN should default to GPIO_OUT_LOW
* once issues with Rev.1 boards are fixed.
*/
{"PP5000_EN", LM4_GPIO_H, (1<<7), GPIO_OUT_HIGH, NULL},
{"PPSX_EN", LM4_GPIO_L, (1<<6), GPIO_OUT_LOW, NULL},
{"SUSP_VR_EN", LM4_GPIO_C, (1<<7), GPIO_OUT_LOW, NULL},
{"TOUCHSCREEN_RESET_L", LM4_GPIO_N, (1<<7), GPIO_OUT_LOW, NULL},

23
power/baytrail.c
View File

@@ -124,7 +124,12 @@ enum x86_state x86_chipset_init(void)
gpio_set_level(GPIO_SUSP_VR_EN, 0);
gpio_set_level(GPIO_PP1350_EN, 0);
gpio_set_level(GPIO_PP3300_DX_EN, 0);
gpio_set_level(GPIO_PP5000_EN, 0);
/*
* TODO(crosbug.com/p/23673): turn off PP5000 after
* Rev.1 hardware is obsolete:
*
* gpio_set_level(GPIO_PP5000_EN, 0);
*/
gpio_set_level(GPIO_PCH_RSMRST_L, 0);
gpio_set_level(GPIO_PCH_SYS_PWROK, 0);
wireless_enable(0);
@@ -180,9 +185,6 @@ enum x86_state x86_handle_state(enum x86_state state)
break;
case X86_G3S5:
/* TODO(rspangler): temporary hack on Rev.1 boards */
gpio_set_level(GPIO_PP5000_EN, 1);
/*
* Wait 10ms after +3VALW good, since that powers VccDSW and
* VccSUS.
@@ -246,7 +248,12 @@ enum x86_state x86_handle_state(enum x86_state state)
chipset_force_shutdown();
wireless_enable(0);
gpio_set_level(GPIO_PP3300_DX_EN, 0);
/* TODO(rspangler) turn off PP5000 after Rev.1 */
/*
* TODO(crosbug.com/p/23673): turn off PP5000 after
* Rev.1 hardware is obsolete:
*
* gpio_set_level(GPIO_PP5000_EN, 0);
*/
gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, 0);
return X86_S3;
}
@@ -299,7 +306,8 @@ enum x86_state x86_handle_state(enum x86_state state)
/* Turn off power rails */
gpio_set_level(GPIO_PP3300_DX_EN, 0);
/* TODO(rspangler: turn off PP5000 after rev.1 */
/* TODO(crosbug.com/p/23673): turn off PP5000 after rev.1 */
/* gpio_set_level(GPIO_PP5000_EN, 0); */
return X86_S3;
case X86_S3S5:
@@ -320,9 +328,6 @@ enum x86_state x86_handle_state(enum x86_state state)
gpio_set_level(GPIO_PCH_RSMRST_L, 0);
gpio_set_level(GPIO_SUSP_VR_EN, 0);
/* TODO(rspangler): temporary hack on rev.1 boards */
gpio_set_level(GPIO_PP5000_EN, 0);
return X86_G3;
}