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https://github.com/Telecominfraproject/OpenCellular.git
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mec1322: hibernation support
This adds hibernation support. The chip can be waken by either GPIO or a timer. The maximum delay allowed is ~2 hours. BUG=chrome-os-partner:24107 TEST=hibernate and wake by GPIO TEST=hibernate and wake by timer BRANCH=None Change-Id: I1e064638a5008894a002a06a738bf6104f18636d Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181202 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This commit is contained in:
Vic (Chun-Ju) Yang
committed by
chrome-internal-fetch
chrome-internal-fetch
parent
aa636df6ab
commit
9785d09fcb
@@ -22,6 +22,7 @@ const struct gpio_info gpio_list[] = {
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{"LED3", GPIO_PORT(15), (1 << 6), GPIO_ODR_LOW, NULL},
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{"PCH_SMI_L", GPIO_PORT(4), (1 << 4), GPIO_ODR_HIGH, NULL},
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{"PCH_WAKE_L", GPIO_PORT(20), (1 << 0), GPIO_ODR_HIGH, NULL},
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{"S1", GPIO_PORT(6), (1 << 3), GPIO_INT_FALLING | GPIO_PULL_UP, NULL},
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/* Unimplemented signals which we need to emulate for now */
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GPIO_SIGNAL_NOT_IMPLEMENTED("RECOVERY_L"),
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GPIO_SIGNAL_NOT_IMPLEMENTED("WP"),
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@@ -13,6 +13,7 @@
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#define CONFIG_WATCHDOG_HELP
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#define CONFIG_FANS 1
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#define CONFIG_ADC
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#define CONFIG_WAKE_PIN GPIO_S1
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/* Modules we want to exclude */
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#undef CONFIG_EEPROM
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@@ -40,6 +41,7 @@ enum gpio_signal {
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GPIO_LED3,
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GPIO_PCH_SMI_L, /* SMI output */
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GPIO_PCH_WAKE_L, /* PCH wake pin */
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GPIO_S1, /* Switch S1 */
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/*
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* Signals which aren't implemented on MEC1322 eval board but we'll
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* emulate anyway, to make it more convenient to debug other code.
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@@ -44,6 +44,7 @@
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#define MEC1322_EC_TRACE_EN REG32(MEC1322_EC_BASE + 0x1c)
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#define MEC1322_EC_JTAG_EN REG32(MEC1322_EC_BASE + 0x20)
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#define MEC1322_EC_WDT_CNT REG32(MEC1322_EC_BASE + 0x28)
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#define MEC1322_EC_ADC_VREF_PD REG32(MEC1322_EC_BASE + 0x38)
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/* Interrupt aggregator */
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@@ -285,6 +286,13 @@ static inline uintptr_t gpio_port_base(int port_id)
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#define MEC1322_ADC_READ(x) REG32(MEC1322_ADC_BASE + 0x14 + (x) * 0x4)
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/* Hibernation timer */
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#define MEC1322_HTIMER_BASE 0x40009800
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#define MEC1322_HTIMER_PRELOAD REG16(MEC1322_HTIMER_BASE + 0x0)
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#define MEC1322_HTIMER_CONTROL REG16(MEC1322_HTIMER_BASE + 0x4)
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#define MEC1322_HTIMER_COUNT REG16(MEC1322_HTIMER_BASE + 0x8)
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/* IRQ Numbers */
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#define MEC1322_IRQ_I2C_0 0
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#define MEC1322_IRQ_I2C_1 1
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@@ -9,6 +9,7 @@
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#include "common.h"
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#include "console.h"
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#include "cpu.h"
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#include "gpio.h"
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#include "host_command.h"
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#include "registers.h"
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#include "system.h"
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@@ -50,7 +51,9 @@ static void check_reset_cause(void)
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flags |= MEC1322_VBAT_RAM(HIBDATA_INDEX_SAVED_RESET_FLAGS);
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MEC1322_VBAT_RAM(HIBDATA_INDEX_SAVED_RESET_FLAGS) = 0;
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if (status & (1 << 5) && !(flags & (RESET_FLAG_SOFT | RESET_FLAG_HARD)))
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if (status & (1 << 5) && !(flags & (RESET_FLAG_SOFT |
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RESET_FLAG_HARD |
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RESET_FLAG_HIBERNATE)))
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flags |= RESET_FLAG_WATCHDOG;
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system_set_reset_flags(flags);
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@@ -70,7 +73,7 @@ void system_pre_init(void)
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check_reset_cause();
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}
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void system_reset(int flags)
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void _system_reset(int flags, int wake_from_hibernate)
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{
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uint32_t save_flags = 0;
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@@ -84,7 +87,9 @@ void system_reset(int flags)
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if (flags & SYSTEM_RESET_LEAVE_AP_OFF)
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save_flags |= RESET_FLAG_AP_OFF;
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if (flags & SYSTEM_RESET_HARD)
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if (wake_from_hibernate)
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save_flags |= RESET_FLAG_HIBERNATE;
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else if (flags & SYSTEM_RESET_HARD)
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save_flags |= RESET_FLAG_HARD;
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else
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save_flags |= RESET_FLAG_SOFT;
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@@ -100,6 +105,11 @@ void system_reset(int flags)
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;
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}
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void system_reset(int flags)
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{
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_system_reset(flags, 0);
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}
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const char *system_get_chip_vendor(void)
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{
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return "smsc";
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@@ -154,7 +164,145 @@ uint32_t system_get_scratchpad(void)
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return MEC1322_VBAT_RAM(HIBDATA_INDEX_SCRATCHPAD);
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}
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static void system_unpower_gpio(void)
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{
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int i, j, k;
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uint32_t val;
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int want_skip;
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const int pins[16][2] = {{0, 7}, {1, 7}, {2, 7}, {3, 6}, {4, 7}, {5, 7},
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{6, 7}, {10, 7}, {11, 7}, {12, 7}, {13, 6},
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{14, 7}, {15, 7}, {16, 5}, {20, 6}, {21, 1} };
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const int skip[5][2] = {{13, 1}, /* VCC1_nRST */
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{6, 3}, /* VCC_PWRGD */
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{12, 1}, /* nRESET_OUT */
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{14, 3}, /* RSMRST# */
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{20, 5}, /* Not exist */
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};
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for (i = 0; i < 16; ++i) {
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for (j = 0; j <= pins[i][1]; ++j) {
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want_skip = 0;
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for (k = 0; k < 5; ++k)
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if (skip[k][0] == pins[i][0] &&
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skip[k][1] == j)
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want_skip = 1;
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if (want_skip)
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continue;
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/*
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* GPIO Input, pull-high, interrupt disabled
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* TODO(crosbug.com/p/25302): Unpower GPIO instead of
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* setting them to be input.
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*/
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val = MEC1322_GPIO_CTL(pins[i][0], j);
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val &= ~((1 << 12) | (1 << 13));
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val &= ~(1 << 9);
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val = (val & ~(0xf << 4)) | (0x4 << 4);
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val = (val & ~0x3) | 0x1;
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MEC1322_GPIO_CTL(pins[i][0], j) = val;
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}
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}
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}
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void system_hibernate(uint32_t seconds, uint32_t microseconds)
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{
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/* TODO(crosbug.com/p/24107): Implement this */
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int i;
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cflush();
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/* Disable interrupts */
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interrupt_disable();
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for (i = 0; i <= 92; ++i) {
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task_disable_irq(i);
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task_clear_pending_irq(i);
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}
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for (i = 8; i <= 23; ++i)
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MEC1322_INT_DISABLE(i) = 0xffffffff;
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MEC1322_INT_BLK_DIS |= 0xffff00;
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/* Set processor clock to lowest, 1MHz */
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MEC1322_PCR_PROC_CLK_CTL = 48;
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/* Power down ADC VREF */
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MEC1322_EC_ADC_VREF_PD |= 1;
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/* Assert nSIO_RESET */
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MEC1322_PCR_PWR_RST_CTL |= 1;
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/* Disable UART */
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MEC1322_UART_ACT &= ~0x1;
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MEC1322_LPC_ACT &= ~0x1;
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/* Disable JTAG */
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MEC1322_EC_JTAG_EN &= ~1;
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/* Disable 32KHz clock */
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MEC1322_VBAT_CE &= ~0x2;
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/* Stop watchdog */
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MEC1322_WDG_CTL &= ~1;
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/* Stop timers */
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MEC1322_TMR32_CTL(0) &= ~1;
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MEC1322_TMR32_CTL(1) &= ~1;
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MEC1322_TMR16_CTL(0) &= ~1;
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/* Power down ADC */
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MEC1322_ADC_CTRL &= ~1;
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/* Disable blocks */
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MEC1322_PCR_CHIP_SLP_EN |= 0x3;
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MEC1322_PCR_EC_SLP_EN |= 0xe0700ff7;
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MEC1322_PCR_HOST_SLP_EN |= 0x5f003;
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MEC1322_PCR_EC_SLP_EN2 |= 0x1ffffff8;
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MEC1322_PCR_SYS_SLP_CTL = (MEC1322_PCR_SYS_SLP_CTL & ~0x7) | 0x2;
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MEC1322_PCR_SLOW_CLK_CTL &= 0xfffffc00;
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CPU_SCB_SYSCTRL |= 0x4;
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system_unpower_gpio();
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#ifdef CONFIG_WAKE_PIN
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gpio_set_flags_by_mask(gpio_list[CONFIG_WAKE_PIN].port,
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gpio_list[CONFIG_WAKE_PIN].mask,
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gpio_list[CONFIG_WAKE_PIN].flags);
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gpio_enable_interrupt(CONFIG_WAKE_PIN);
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interrupt_enable();
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task_enable_irq(MEC1322_IRQ_GIRQ8);
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task_enable_irq(MEC1322_IRQ_GIRQ9);
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task_enable_irq(MEC1322_IRQ_GIRQ10);
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task_enable_irq(MEC1322_IRQ_GIRQ11);
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task_enable_irq(MEC1322_IRQ_GIRQ20);
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#endif
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if (seconds || microseconds) {
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MEC1322_INT_BLK_EN |= 1 << 17;
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MEC1322_INT_ENABLE(17) |= 1 << 20;
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interrupt_enable();
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task_enable_irq(MEC1322_IRQ_HTIMER);
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if (seconds > 2) {
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ASSERT(seconds <= 0xffff / 8);
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MEC1322_HTIMER_CONTROL = 1;
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MEC1322_HTIMER_PRELOAD =
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(seconds * 8 + microseconds / 125000);
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} else {
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MEC1322_HTIMER_CONTROL = 0;
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MEC1322_HTIMER_PRELOAD =
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(seconds * 1000000 + microseconds) * 2 / 71;
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}
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}
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asm("wfi");
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/* We lost states of most modules, let's just reboot */
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_system_reset(0, 1);
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}
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static void htimer_interrupt(void)
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{
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/* Time to wake up */
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_system_reset(0, 1);
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}
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DECLARE_IRQ(MEC1322_IRQ_HTIMER, htimer_interrupt, 1);
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