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cr50: reduce UART TX buffer size

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As we are getting short on SRAM and do not need that extensive UART
debugging support, let's reduce the UART TX buffer size to a standard
value of 512 bytes.

BRANCH=none
BUG=chrome-os-partner:58961
TEST=built and booted a new image. Verified that the cr50 console
     connection is still operational.

Change-Id: Ieb77671cb144b9ea5073f5d3242c9e41e5d78883
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/418948
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
This commit is contained in:
Vadim Bendebury
2016-12-12 12:18:44 -08:00
committed by chrome-bot
parent ac4c3020de
commit 995c6b6985
1 changed files with 0 additions and 9 deletions
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9
board/cr50/board.h
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@@ -196,15 +196,6 @@ int is_ec_rst_asserted(void);
/* TODO(crosbug.com/p/56540): Remove this when UART0_RX works everywhere */
#define GC_UART0_RX_DISABLE
/*
* This would be a low hanging fruit if there is a need to reduce memory
* footprint. Having a large buffer helps not to drop debug outputs generated
* before console is initialized, but this is not really necessary in a
* production device.
*/
#undef CONFIG_UART_TX_BUF_SIZE
#define CONFIG_UART_TX_BUF_SIZE 4096
#define CC_DEFAULT (CC_ALL & ~CC_MASK(CC_TPM))
/* Nv Memory users */