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servo_micro: switch parity to 8 bit data

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Parity defaulted to 7 bit data, but hammer wants 8 bit.
Change servo_micro to match.

BRANCH=servo-firmware
BUG=b:37513705
TEST=flash_ec -b hammer

Change-Id: I91cc126b03c99107084fb0d1d2e90031b2435fe2
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/952677
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
This commit is contained in:
Nick Sanders
2018-03-06 19:00:22 -08:00
committed by chrome-bot
parent a96fbd0c97
commit 99bcab486d
2 changed files with 11 additions and 2 deletions
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2
chip/stm32/registers.h
View File

@@ -459,6 +459,7 @@
#define STM32_USART_CR1_TXEIE (1 << 7)
#define STM32_USART_CR1_PS (1 << 9)
#define STM32_USART_CR1_PCE (1 << 10)
#define STM32_USART_CR1_M (1 << 12)
#define STM32_USART_CR1_OVER8 (1 << 15)
#define STM32_USART_CR2(base) STM32_USART_REG(base, 0x04)
#define STM32_USART_CR2_SWAP (1 << 15)
@@ -504,6 +505,7 @@
#define STM32_USART_CR1_TXEIE (1 << 7)
#define STM32_USART_CR1_PS (1 << 9)
#define STM32_USART_CR1_PCE (1 << 10)
#define STM32_USART_CR1_M (1 << 12)
#define STM32_USART_CR1_UE (1 << 13)
#define STM32_USART_CR1_OVER8 (1 << 15) /* STM32L only */
#define STM32_USART_CR2(base) STM32_USART_REG(base, 0x10)

11
chip/stm32/usart.c
View File

@@ -127,6 +127,11 @@ int usart_get_parity(struct usart_config const *config)
return 2;
}
/*
* We only allow 8 bit word. CR1_PCE modifies parity enable,
* CR1_PS modifies even/odd, CR1_M modifies total word length
* to make room for parity.
*/
void usart_set_parity(struct usart_config const *config, int parity)
{
uint32_t ue;
@@ -141,7 +146,8 @@ void usart_set_parity(struct usart_config const *config, int parity)
if (parity) {
/* Set parity control enable. */
STM32_USART_CR1(base) |= STM32_USART_CR1_PCE;
STM32_USART_CR1(base) |=
(STM32_USART_CR1_PCE | STM32_USART_CR1_M);
/* Set parity select even/odd bit. */
if (parity == 2)
STM32_USART_CR1(base) &= ~STM32_USART_CR1_PS;
@@ -149,7 +155,8 @@ void usart_set_parity(struct usart_config const *config, int parity)
STM32_USART_CR1(base) |= STM32_USART_CR1_PS;
} else {
STM32_USART_CR1(base) &=
~(STM32_USART_CR1_PCE | STM32_USART_CR1_PS);
~(STM32_USART_CR1_PCE | STM32_USART_CR1_PS |
STM32_USART_CR1_M);
}
/* Restore active state. */