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npcx: Conforming CONFIG_UART_HOST define to match intention

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The CONFIG_UART_HOST is supposed to be defined to the index of the UART we
want to use. It is not supposed to be defined as a boolean. Updated npcx
and all incorrect uses.

BRANCH=none
BUG=none
TEST=Added the following diff to ensure that everything still built:
diff --git a/chip/npcx/lpc.c b/chip/npcx/lpc.c
index 446baa842..826233744 100644
--- a/chip/npcx/lpc.c
+++ b/chip/npcx/lpc.c
@@ -897,6 +897,9 @@ static void lpc_init(void)

 	/* Initialize Hardware for UART Host */
 #ifdef CONFIG_UART_HOST
+#if !CONFIG_UART_HOST
+#error "Fix me"
+#endif
 	/* Init COMx LPC UART */
 	/* FMCLK have to using 50MHz */
 	NPCX_DEVALT(0xB) = 0xFF;

Change-Id: Ia46c7cb86c6040a5c75dddf23d5ccd8e33210581
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/949308
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This commit is contained in:
Jett Rink
2018-03-05 10:46:06 -07:00
committed by chrome-bot
parent 3b10e08bc3
commit 9ea3cbecb8
15 changed files with 1 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
board/coral/board.h
View File

@@ -144,7 +144,6 @@
#define CONFIG_DPTF
#define CONFIG_DPTF_DEVICE_ORIENTATION
#define CONFIG_SCI_GPIO GPIO_PCH_SCI_L
#define CONFIG_UART_HOST 0
#define CONFIG_VBOOT_HASH
#define CONFIG_VOLUME_BUTTONS
#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL

1
board/eve/board.h
View File

@@ -44,7 +44,6 @@
#define CONFIG_PWM_KBLIGHT
#define CONFIG_SPI_FLASH_REGS
#define CONFIG_SPI_FLASH_W25X40
#define CONFIG_UART_HOST 0
#define CONFIG_VBOOT_HASH
#define CONFIG_VOLUME_BUTTONS
#define CONFIG_VSTORE

1
board/fizz/board.h
View File

@@ -38,7 +38,6 @@
#define CONFIG_CHIP_PANIC_BACKUP
#define CONFIG_SPI_FLASH_REGS
#define CONFIG_SPI_FLASH_W25X40
#define CONFIG_UART_HOST 0
#define CONFIG_WATCHDOG_HELP
#define CONFIG_WIRELESS
#define CONFIG_WIRELESS_SUSPEND \

1
board/glkrvp/board.h
View File

@@ -97,7 +97,6 @@
#define CONFIG_LID_SWITCH
#define CONFIG_LTO
#define CONFIG_UART_HOST 0
#define CONFIG_LOW_POWER_IDLE

1
board/grunt/board.h
View File

@@ -67,7 +67,6 @@
#define CONFIG_POWER_SHUTDOWN_PAUSE_IN_S5
#define CONFIG_POWER_BUTTON
#define CONFIG_POWER_BUTTON_X86
#define CONFIG_UART_HOST 0
#define CONFIG_KEYBOARD_BOARD_CONFIG
#define CONFIG_KEYBOARD_COL2_INVERTED

1
board/kahlee/board.h
View File

@@ -119,7 +119,6 @@
#define CONFIG_TEMP_SENSOR
#define CONFIG_TEMP_SENSOR_G781
#define CONFIG_SCI_GPIO GPIO_PCH_SCI_L
#define CONFIG_UART_HOST 0
#define CONFIG_VBOOT_HASH
#define CONFIG_BACKLIGHT_LID
#define CONFIG_WIRELESS

1
board/nami/board.h
View File

@@ -40,7 +40,6 @@
#define CONFIG_SOFTWARE_PANIC
#define CONFIG_SPI_FLASH_REGS
#define CONFIG_SPI_FLASH_W25X40
#define CONFIG_UART_HOST 0
#define CONFIG_VBOOT_HASH
#define CONFIG_SHA256_UNROLLED
#define CONFIG_VOLUME_BUTTONS

1
board/nautilus/board.h
View File

@@ -35,7 +35,6 @@
#define CONFIG_SOFTWARE_PANIC
#define CONFIG_SPI_FLASH_REGS
#define CONFIG_SPI_FLASH_W25X40
#define CONFIG_UART_HOST 0
#define CONFIG_VBOOT_HASH
#define CONFIG_SHA256_UNROLLED
#define CONFIG_VOLUME_BUTTONS

3
board/npcx7_evb/board.h
View File

@@ -52,9 +52,6 @@
#define I2C_PORT_MASTER NPCX_I2C_PORT0_0
#define I2C_PORT_HOST 0
/* LPC UART */
#define CONFIG_UART_HOST 0
/* Fans for testing */
#define CONFIG_FANS 1

1
board/npcx_evb/board.h
View File

@@ -39,7 +39,6 @@
#define CONFIG_CMD_SCRATCHPAD
#define CONFIG_CMD_I2CWEDGE
#define CONFIG_UART_HOST 0
#define CONFIG_FANS 1
/* Optional feature - used by nuvoton */

1
board/poppy/board.h
View File

@@ -35,7 +35,6 @@
#define CONFIG_SOFTWARE_PANIC
#define CONFIG_SPI_FLASH_REGS
#define CONFIG_SPI_FLASH_W25X40
#define CONFIG_UART_HOST 0
#define CONFIG_VBOOT_HASH
#define CONFIG_SHA256_UNROLLED
#define CONFIG_VOLUME_BUTTONS

1
board/reef/board.h
View File

@@ -138,7 +138,6 @@
#define CONFIG_DPTF
#define CONFIG_DPTF_DEVICE_ORIENTATION
#define CONFIG_SCI_GPIO GPIO_PCH_SCI_L
#define CONFIG_UART_HOST 0
#define CONFIG_VOLUME_BUTTONS
#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL
#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL

1
board/wheatley/board.h
View File

@@ -40,7 +40,6 @@
#define CONFIG_I2C
#define CONFIG_I2C_MASTER
#define CONFIG_LPC
#define CONFIG_UART_HOST 0
#define CONFIG_KEYBOARD_PROTOCOL_8042
#define CONFIG_LED_COMMON
#define CONFIG_LID_ANGLE

1
board/zoombini/board.h
View File

@@ -82,7 +82,6 @@
#define CONFIG_POWER_PP5000_CONTROL
#define CONFIG_POWER_S0IX
#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE
#define CONFIG_UART_HOST 0
#define CONFIG_I2C_MASTER

2
chip/npcx/lpc.c
View File

@@ -896,7 +896,7 @@ static void lpc_init(void)
#endif
/* Initialize Hardware for UART Host */
#if CONFIG_UART_HOST
#ifdef CONFIG_UART_HOST
/* Init COMx LPC UART */
/* FMCLK have to using 50MHz */
NPCX_DEVALT(0xB) = 0xFF;