zoombini: Add BC1.2 support.

This commit enables the use of the TI BQ24932 charger detector.
Additionally, the charge ramping config option is turned on as the
ISL9238 supports HW based charge ramping.

BUG=none
BRANCH=none
TEST=`make -j buildall`
TEST=Flash modified version on npcx7_evb and verify no panics or asserts
are hit.

CQ-DEPEND=CL:601533

Change-Id: Ia6e132fc86b00b70f5d88894c34565be862f84b1
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/601532
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
This commit is contained in:
Aseda Aboagye
2017-08-03 17:13:43 -07:00
committed by chrome-bot
parent 874bba9c47
commit a138c61817
4 changed files with 37 additions and 3 deletions

View File

@@ -28,6 +28,7 @@
#include "pwm.h"
#include "pwm_chip.h"
#include "registers.h"
#include "system.h"
#include "switch.h"
#include "tcpci.h"
#include "usb_mux.h"
@@ -172,6 +173,30 @@ static void board_chipset_shutdown(void)
}
DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT);
int board_get_ramp_current_limit(int supplier, int sup_curr)
{
/* Use the current limit that was decided by the BQ24392 driver. */
if (supplier == CHARGE_SUPPLIER_OTHER)
return sup_curr;
else
return 500;
}
int board_is_ramp_allowed(int supplier)
{
/* Don't allow ramping in RO when write protected. */
if (system_get_image_copy() != SYSTEM_IMAGE_RW
&& system_is_locked())
return 0;
/*
* Due to the limitations in the application of the BQ24392, we
* don't quite know exactly what we're plugged into. Therefore,
* the supplier type will be CHARGE_SUPPLIER_OTHER.
*/
return supplier == CHARGE_SUPPLIER_OTHER;
}
void board_reset_pd_mcu(void)
{
/* GPIO_USB_PD_RST_L resets all the TCPCs. */

View File

@@ -34,6 +34,7 @@
#define CONFIG_BOARD_VERSION
#define CONFIG_BC12_DETECT_BQ24392
#define CONFIG_CHARGER
#define CONFIG_CHARGER_V2
#define CONFIG_CHARGE_MANAGER
@@ -42,10 +43,8 @@
#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 1
#define CONFIG_CHARGER_SENSE_RESISTOR 10
#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20
/* TODO(aaboagye): add when BC 1.2 stuff ready. */
#if 0
#define CONFIG_CHARGE_RAMP_HW
#define CONFIG_USB_CHARGER
#endif /* 0 */
#define CONFIG_CHIPSET_CANNONLAKE
#define CONFIG_CHIPSET_RESET_HOOK

View File

@@ -22,6 +22,9 @@
#define CONFIG_TASK_LIST \
TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \
TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 1, TASK_STACK_SIZE) \
TASK_ALWAYS(USB_CHG_P2, usb_charger_task, 2, TASK_STACK_SIZE) \
TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \

View File

@@ -71,6 +71,13 @@ GPIO(USB_C0_CHARGE_EN_L, PIN(0, 3), GPIO_OUT_LOW)
GPIO(USB_C1_CHARGE_EN_L, PIN(0, 4), GPIO_OUT_LOW)
GPIO(USB_C2_CHARGE_EN_L, PIN(4, 0), GPIO_OUT_LOW)
GPIO(USB_C0_BC12_VBUS_ON, PIN(8, 2), GPIO_ODR_LOW)
GPIO(USB_C1_BC12_VBUS_ON, PIN(B, 1), GPIO_ODR_LOW)
GPIO(USB_C2_BC12_VBUS_ON, PIN(E, 0), GPIO_ODR_LOW)
GPIO(USB_C0_BC12_CHG_DET, PIN(6, 2), GPIO_INPUT)
GPIO(USB_C1_BC12_CHG_DET, PIN(8, 3), GPIO_INPUT)
GPIO(USB_C2_BC12_CHG_DET, PIN(E, 4), GPIO_INPUT)
GPIO(BOARD_VERSION1, PIN(9, 6), GPIO_INPUT)
GPIO(BOARD_VERSION2, PIN(9, 3), GPIO_INPUT)
GPIO(BOARD_VERSION3, PIN(F, 0), GPIO_INPUT)