soc/amd/stoneyridge: Check UART index

The Stoney Ridge APU has only two internal UARTs.  Add checks for
invalid settings.  When enabling the UART, return if the console is
on any UART not equal 0 or 1.  The base address returned is 0 if an
invalid configuration is used.  All callers check the return value
before using the returned value.  Finally, provide an assert at the
earliest availability of the console to get the notice into the
cbmem console.

BUG=b:62201567
TEST=Build with UART = -1, 0, 2.  Inspect objdump and boot to OS.
     Build without ST UART and inspect with objdump.

Change-Id: I9432571712bae15a604f4280ea5e0f81fd68604d
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/21096
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/soc/amd/stoneyridge/bootblock/bootblock.c

@@ -15,6 +15,7 @@
  */
 
 #include <stdint.h>
+#include <assert.h>
 #include <console/console.h>
 #include <smp/node.h>
 #include <bootblock_common.h>
@@ -52,6 +53,10 @@ void bootblock_soc_early_init(void)
 
 void bootblock_soc_init(void)
 {
+	if (IS_ENABLED(CONFIG_STONEYRIDGE_UART))
+		assert(CONFIG_UART_FOR_CONSOLE >= 0
+					&& CONFIG_UART_FOR_CONSOLE <= 1);
+
 	u32 val = cpuid_eax(1);
 	printk(BIOS_DEBUG, "Family_Model: %08x\n", val);
 

src/soc/amd/stoneyridge/early_setup.c

@@ -35,6 +35,9 @@ void configure_stoneyridge_uart(void)
 {
 	u8 byte, byte2;
 
+	if (CONFIG_UART_FOR_CONSOLE < 0 || CONFIG_UART_FOR_CONSOLE > 1)
+		return;
+
 	/* Power on the UART and AMBA devices */
 	byte = read8((void *)ACPI_MMIO_BASE + AOAC_BASE + FCH_AOAC_REG56
 					+ CONFIG_UART_FOR_CONSOLE * 2);

src/soc/amd/stoneyridge/uart.c

@@ -18,6 +18,9 @@
 
 uintptr_t uart_platform_base(int idx)
 {
+	if (CONFIG_UART_FOR_CONSOLE < 0 || CONFIG_UART_FOR_CONSOLE > 1)
+		return 0;
+
 	return (uintptr_t)(APU_UART0_BASE + 0x2000 * (idx & 1));
 }