Add basic support for Twinkie dongle

Just the board configuration to test the PCB

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=chrome-os-partner:28337
TEST=make BOARD=twinkie

Change-Id: I3468a651c97aba48a7d3c07ff6a34a676988e426
Reviewed-on: https://chromium-review.googlesource.com/196692
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>

board/twinkie/board.c

@@ -0,0 +1,109 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+/* Twinkie dongle configuration */
+
+#include "adc.h"
+#include "adc_chip.h"
+#include "common.h"
+#include "console.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "i2c.h"
+#include "registers.h"
+#include "task.h"
+#include "util.h"
+
+void cc2_event(enum gpio_signal signal)
+{
+	ccprintf("INA!\n");
+}
+
+void vbus_event(enum gpio_signal signal)
+{
+	ccprintf("INA!\n");
+}
+
+/* GPIO signal list.  Must match order from enum gpio_signal. */
+const struct gpio_info gpio_list[] = {
+	{"CC2_ALERT_L",       GPIO_A, (1<<7),  GPIO_INT_FALLING, cc2_event},
+	{"VBUS_ALERT_L",      GPIO_B, (1<<2),  GPIO_INT_FALLING, vbus_event},
+
+	{"CC1_EN",            GPIO_A, (1<<0),  GPIO_OUT_HIGH, NULL},
+	{"CC1_PD",            GPIO_A, (1<<1),  GPIO_ANALOG, NULL},
+	{"CC2_EN",            GPIO_A, (1<<2),  GPIO_OUT_HIGH, NULL},
+	{"CC2_PD",            GPIO_A, (1<<3),  GPIO_ANALOG, NULL},
+	{"DAC",               GPIO_A, (1<<4),  GPIO_ANALOG, NULL},
+
+	{"CC1_RA",            GPIO_A, (1<<8),  GPIO_ODR_HIGH, NULL},
+	{"USB_DM",            GPIO_A, (1<<11), GPIO_ANALOG, NULL},
+	{"USB_DP",            GPIO_A, (1<<12), GPIO_ANALOG, NULL},
+	{"CC1_RPUSB",         GPIO_A, (1<<13), GPIO_ODR_HIGH, NULL},
+	{"CC1_RP1A5",         GPIO_A, (1<<14), GPIO_ODR_HIGH, NULL},
+	{"CC1_RP3A0",         GPIO_A, (1<<15), GPIO_ODR_HIGH, NULL},
+	{"CC2_RPUSB",         GPIO_B, (1<<0),  GPIO_ODR_HIGH, NULL},
+
+	{"CC1_TX_EN",         GPIO_B, (1<<1),  GPIO_OUT_LOW, NULL},
+	{"CC2_TX_EN",         GPIO_B, (1<<3),  GPIO_OUT_LOW, NULL},
+	{"CC1_RD",            GPIO_B, (1<<5),  GPIO_ODR_HIGH, NULL},
+	{"I2C_SCL",           GPIO_B, (1<<6),  GPIO_INPUT,    NULL},
+	{"I2C_SDA",           GPIO_B, (1<<7),  GPIO_INPUT,    NULL},
+	{"CC2_RD",            GPIO_B, (1<<8),  GPIO_ODR_HIGH, NULL},
+	{"LED_G_L",           GPIO_B, (1<<11), GPIO_ODR_HIGH, NULL},
+	{"LED_R_L",           GPIO_B, (1<<13), GPIO_ODR_HIGH, NULL},
+	{"LED_B_L",           GPIO_B, (1<<14), GPIO_ODR_HIGH, NULL},
+	{"CC2_RA",            GPIO_B, (1<<15), GPIO_ODR_HIGH, NULL},
+	{"CC2_RP1A5",         GPIO_C, (1<<14), GPIO_ODR_HIGH, NULL},
+	{"CC2_RP3A0",         GPIO_C, (1<<15), GPIO_ODR_HIGH, NULL},
+
+	/* Unimplemented signals which we need to emulate for now */
+	GPIO_SIGNAL_NOT_IMPLEMENTED("ENTERING_RW"),
+	GPIO_SIGNAL_NOT_IMPLEMENTED("WP_L"),
+};
+BUILD_ASSERT(ARRAY_SIZE(gpio_list) == GPIO_COUNT);
+
+/* Initialize board. */
+void board_config_pre_init(void)
+{
+	/* enable SYSCFG clock */
+	STM32_RCC_APB2ENR |= 1 << 0;
+	/* Remap USART DMA to match the USART driver */
+	STM32_SYSCFG_CFGR1 |= (1 << 9) | (1 << 10);/* Remap USART1 RX/TX DMA */
+	/* 40 MHz pin speed on UART PA9/PA10 */
+	STM32_GPIO_OSPEEDR(GPIO_A) |= 0x003C0000;
+	/* 40 MHz pin speed on TX clock out PB9 */
+	STM32_GPIO_OSPEEDR(GPIO_B) |= 0x000C0000;
+}
+
+static void board_init(void)
+{
+	/* Enable interrupts for INAs. */
+	gpio_enable_interrupt(GPIO_CC2_ALERT_L);
+	gpio_enable_interrupt(GPIO_VBUS_ALERT_L);
+}
+DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
+
+/* Pins with alternate functions */
+const struct gpio_alt_func gpio_alt_funcs[] = {
+	{GPIO_A, 0x6000, 0, MODULE_USB_PD},/* SPI1: MISO(PA6) SCK(PA5) */
+	{GPIO_B, 0x0010, 0, MODULE_USB_PD},/* SPI1: MISO(PB4) */
+	{GPIO_B, 0x0200, 2, MODULE_USB_PD},/* TIM17_CH1: PB9 */
+	{GPIO_A, 0x0600, 1, MODULE_UART, GPIO_PULL_UP},  /* USART1: PA9/PA10 */
+	{GPIO_B, 0x00C0, 1, MODULE_I2C},   /* I2C1 MASTER:PB6/7 */
+};
+const int gpio_alt_funcs_count = ARRAY_SIZE(gpio_alt_funcs);
+
+/* ADC channels */
+const struct adc_t adc_channels[] = {
+	/* USB PD CC lines sensing. Converted to mV (3300mV/4096). */
+	[ADC_CH_CC1_PD] = {"CC1_PD", 3300, 4096, 0, STM32_AIN(1)},
+	[ADC_CH_CC2_PD] = {"CC2_PD", 3300, 4096, 0, STM32_AIN(3)},
+};
+BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
+
+/* I2C ports */
+const struct i2c_port_t i2c_ports[] = {
+	{"master", I2C_PORT_MASTER, 100, GPIO_I2C_SCL, GPIO_I2C_SDA},
+};
+const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);

board/twinkie/board.h

@@ -0,0 +1,91 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Twinkie dongle configuration */
+
+#ifndef __BOARD_H
+#define __BOARD_H
+
+/* 48 MHz SYSCLK clock frequency */
+#define CPU_CLOCK 48000000
+
+/* the UART console is on USART1 (PA9/PA10) */
+#define CONFIG_UART_CONSOLE 1
+
+/* Optional features */
+#define CONFIG_STM_HWTIMER32
+#define CONFIG_ADC
+#define CONFIG_BOARD_PRE_INIT
+#define CONFIG_I2C
+#define CONFIG_INA231
+#undef CONFIG_WATCHDOG_HELP
+#undef CONFIG_LID_SWITCH
+#undef CONFIG_TASK_PROFILING
+
+/* I2C ports configuration */
+#define I2C_PORT_MASTER 0
+
+/*
+ * Allow dangerous commands all the time, since we don't have a write protect
+ * switch.
+ */
+#define CONFIG_SYSTEM_UNLOCKED
+
+#ifndef __ASSEMBLER__
+
+/* Timer selection */
+#define TIM_CLOCK_PD_RX 1
+#define TIM_CLOCK32 2
+#define TIM_ADC     3
+
+/* GPIO signal list */
+enum gpio_signal {
+	GPIO_CC2_ALERT_L,
+	GPIO_VBUS_ALERT_L,
+
+	GPIO_CC1_EN,
+	GPIO_CC1_PD,
+	GPIO_CC2_EN,
+	GPIO_CC2_PD,
+	GPIO_DAC,
+
+	GPIO_CC1_RA,
+	GPIO_USB_DM,
+	GPIO_USB_DP,
+	GPIO_CC1_RPUSB,
+	GPIO_CC1_RP1A5,
+	GPIO_CC1_RP3A0,
+	GPIO_CC2_RPUSB,
+
+	GPIO_CC1_TX_EN,
+	GPIO_CC2_TX_EN,
+	GPIO_CC1_RD,
+	GPIO_I2C_SCL,
+	GPIO_I2C_SDA,
+	GPIO_CC2_RD,
+	GPIO_LED_G_L,
+	GPIO_LED_R_L,
+	GPIO_LED_B_L,
+	GPIO_CC2_RA,
+	GPIO_CC2_RP1A5,
+	GPIO_CC2_RP3A0,
+
+	/* Unimplemented signals we emulate */
+	GPIO_ENTERING_RW,
+	GPIO_WP_L,
+	/* Number of GPIOs; not an actual GPIO */
+	GPIO_COUNT
+};
+
+/* ADC signal */
+enum adc_channel {
+	ADC_CH_CC1_PD = 0,
+	ADC_CH_CC2_PD,
+	/* Number of ADC channels */
+	ADC_CH_COUNT
+};
+#endif /* !__ASSEMBLER__ */
+
+#endif /* __BOARD_H */

board/twinkie/build.mk

@@ -0,0 +1,13 @@
+# -*- makefile -*-
+# Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Board specific files build
+
+# the IC is STmicro STM32F072B
+CHIP:=stm32
+CHIP_FAMILY:=stm32f0
+CHIP_VARIANT:=stm32f07x
+
+board-y=board.o

board/twinkie/ec.tasklist

@@ -0,0 +1,21 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/**
+ * List of enabled tasks in the priority order
+ *
+ * The first one has the lowest priority.
+ *
+ * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
+ * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
+ * where :
+ * 'n' in the name of the task
+ * 'r' in the main routine of the task
+ * 'd' in an opaque parameter passed to the routine at startup
+ * 's' is the stack size in bytes; must be a multiple of 8
+ */
+#define CONFIG_TASK_LIST \
+	TASK_ALWAYS(HOOKS, hook_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE)

util/flash_ec

@@ -264,7 +264,7 @@ save="$(servo_save)"
 
 case "${BOARD}" in
 	big | discovery | nyan | pit | snow | spring ) flash_stm32 ;;
-	fruitpie | zinger | firefly | samus_pd) flash_stm32 ;;
+	fruitpie | zinger | firefly | samus_pd | twinkie) flash_stm32 ;;
 	falco | peppy | rambi | samus | squawks ) flash_lm4 ;;
 	link ) flash_link ;;
 	*) die "board ${BOARD} not supported" ;;