scottk/OpenCellular
1
0
Fork 0
mirror of https://github.com/Telecominfraproject/OpenCellular.git synced 2026-01-11 18:35:28 +00:00
Code Issues Packages Projects Releases Wiki Activity

mediatek: Fix llama build

Browse Source 
The llama AP_RESET GPIO differs in polarity from oak.

BUG=chromium:517250
TEST=`make buildall -j`
BRANCH=None

Change-Id: Id06bf39e758b528d154936a3e8561704fdf4cce9
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/290950
Commit-Queue: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
This commit is contained in:
Shawn Nematbakhsh
2015-08-05 16:05:02 -07:00
committed by ChromeOS Commit Bot
parent 1e95466f3a
commit a7bf7b9564
5 changed files with 32 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
board/llama/board.c
View File

@@ -78,3 +78,8 @@ void board_config_pre_init(void)
*/
STM32_SYSCFG_CFGR1 |= (1 << 9) | (1 << 10); /* Remap USART1 RX/TX DMA */
}
void board_set_ap_reset(int asserted)
{
gpio_set_level(GPIO_AP_RESET_H, asserted);
}

3
board/llama/board.h
View File

@@ -93,6 +93,9 @@ enum pwm_channel {
#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 /* mOhm */
#define CONFIG_CHARGER_INPUT_CURRENT 2150 /* mA */
/* Set AP reset pin according to parameter */
void board_set_ap_reset(int asserted);
#endif /* !__ASSEMBLER__ */
#endif /* __CROS_EC_BOARD_H */

21
board/oak/board.c
View File

@@ -27,6 +27,7 @@
#include "registers.h"
#include "spi.h"
#include "switch.h"
#include "system.h"
#include "task.h"
#include "temp_sensor.h"
#include "temp_sensor_chip.h"
@@ -385,3 +386,23 @@ static void check_ap_reset_second(void)
}
DECLARE_HOOK(HOOK_SECOND, check_ap_reset_second, HOOK_PRIO_DEFAULT);
#endif
/**
* Set AP reset.
*
* PMIC_WARM_RESET_H (PB3) is connected to PMIC RESET before rev < 3.
* AP_RESET_L (PC3, CPU_WARM_RESET_L) is connected to PMIC SYSRSTB
* after rev >= 3.
*/
void board_set_ap_reset(int asserted)
{
if (system_get_board_version() < 3) {
/* Signal is active-high */
CPRINTS("pmic warm reset(%d)", asserted);
gpio_set_level(GPIO_PMIC_WARM_RESET_H, asserted);
} else {
/* Signal is active-low */
CPRINTS("ap warm reset(%d)", asserted);
gpio_set_level(GPIO_AP_RESET_L, !asserted);
}
}

2
board/oak/board.h
View File

@@ -178,6 +178,8 @@ enum temp_sensor_id {
/* Reset PD MCU */
void board_reset_pd_mcu(void);
/* Set AP reset pin according to parameter */
void board_set_ap_reset(int asserted);
/* Control type-C DP route and hotplug detect signal */
void board_typec_dp_on(int port);

16
power/mediatek.c
View File

@@ -267,25 +267,11 @@ static void set_pmic_pwron(int asserted)
/**
* Set the WARM RESET signal.
*
* PMIC_WARM_RESET_H (PB3) is stuffed before rev < 3 and connected to PMIC RESET
* After rev >= 3, this is removed. This should not effected the new board.
*
* AP_RESET_L (PC3, CPU_WARM_RESET_L) is stuffed after rev >= 3
* and connected to PMIC SYSRSTB
*
* @param asserted off (=0) or on (=1)
*/
static void set_warm_reset(int asserted)
{
if (system_get_board_version() < 3) {
/* Signal is active-high */
CPRINTS("pmic warm reset(%d)", asserted);
gpio_set_level(GPIO_PMIC_WARM_RESET_H, asserted);
} else {
/* Signal is active-low */
CPRINTS("ap warm reset(%d)", asserted);
gpio_set_level(GPIO_AP_RESET_L, !asserted);
}
board_set_ap_reset(asserted);
}
/**