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mec1322_evb: Remove board
This board is no longer in use. BUG=None TEST=`make buildall -j` BRANCH=None Change-Id: Ie0d03e0a817ba101c01909f95955d51f8dfae03c Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314920 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
This commit is contained in:
Shawn Nematbakhsh
committed by
chrome-bot
chrome-bot
parent
4421d75c24
commit
af3172cd7e
@@ -1 +0,0 @@
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../../Makefile
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@@ -1,59 +0,0 @@
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/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* MEC1322 eval board-specific configuration */
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#include "adc.h"
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#include "adc_chip.h"
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#include "fan.h"
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#include "gpio.h"
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#include "i2c.h"
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#include "registers.h"
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#include "spi.h"
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#include "util.h"
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#define GPIO_KB_INPUT GPIO_INPUT
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#define GPIO_KB_OUTPUT (GPIO_ODR_HIGH | GPIO_PULL_UP)
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#include "gpio_list.h"
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/* ADC channels */
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const struct adc_t adc_channels[] = {
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[ADC_CH_1] = {"ADC1", 1, 1, 0, MEC1322_ADC_CH(1)},
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[ADC_CH_2] = {"ADC2", 1, 1, 0, MEC1322_ADC_CH(2)},
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[ADC_CH_3] = {"ADC3", 1, 1, 0, MEC1322_ADC_CH(3)},
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[ADC_CH_4] = {"ADC4", 1, 1, 0, MEC1322_ADC_CH(4)},
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};
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BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
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/* Physical fans. These are logically separate from pwm_channels. */
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const struct fan_t fans[] = {
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{.flags = FAN_USE_RPM_MODE,
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.rpm_min = 1500,
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.rpm_start = 1500,
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.rpm_max = 8000,
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.ch = 0,
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.pgood_gpio = -1,
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.enable_gpio = -1,
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},
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};
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BUILD_ASSERT(ARRAY_SIZE(fans) == CONFIG_FANS);
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/* I2C ports */
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const struct i2c_port_t i2c_ports[] = {
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{"port0", MEC1322_I2C0_0, 100},
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};
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const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
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/* SPI master ports */
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const struct spi_device_t spi_devices[] = {
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{ CONFIG_SPI_FLASH_PORT, 0, GPIO_SHD_CS0},
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};
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const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices);
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const enum gpio_signal hibernate_wake_pins[] = {
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GPIO_S1,
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};
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const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);
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@@ -1,44 +0,0 @@
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/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* MEC1322 eval board configuration */
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#ifndef __CROS_EC_BOARD_H
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#define __CROS_EC_BOARD_H
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/* Optional features */
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#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands */
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#define CONFIG_WATCHDOG_HELP
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#define CONFIG_FANS 1
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#define CONFIG_ADC
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#define CONFIG_FLASH_SIZE 0x00800000
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#define CONFIG_I2C
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#define CONFIG_I2C_MASTER
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#define CONFIG_SPI_FLASH_W25Q64
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#define CONFIG_SPI_FLASH_PORT 0
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/* Modules we want to exclude */
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#undef CONFIG_EEPROM
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#undef CONFIG_PSTORE
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#undef CONFIG_LID_SWITCH
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#undef CONFIG_PECI
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#undef CONFIG_SWITCH
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#ifndef __ASSEMBLER__
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enum adc_channel {
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ADC_CH_1 = 0,
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ADC_CH_2,
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ADC_CH_3,
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ADC_CH_4,
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ADC_CH_COUNT
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};
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#include "gpio_signal.h"
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#endif /* !__ASSEMBLER__ */
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#endif /* __CROS_EC_BOARD_H */
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@@ -1,12 +0,0 @@
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# -*- makefile -*-
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# Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
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# Use of this source code is governed by a BSD-style license that can be
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# found in the LICENSE file.
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#
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# Board specific files build
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#
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# the IC is SMSC MEC1322
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CHIP:=mec1322
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board-y=board.o
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@@ -1,22 +0,0 @@
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/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/**
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* List of enabled tasks in the priority order
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*
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* The first one has the lowest priority.
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*
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* For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
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* TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
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* where :
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* 'n' in the name of the task
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* 'r' in the main routine of the task
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* 'd' in an opaque parameter passed to the routine at startup
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* 's' is the stack size in bytes; must be a multiple of 8
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*/
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#define CONFIG_TASK_LIST \
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TASK_ALWAYS(HOOKS, hook_task, NULL, TASK_STACK_SIZE) \
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TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
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TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE)
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@@ -1,45 +0,0 @@
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/* -*- mode:c -*-
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*
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* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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GPIO(LED1, PIN(154), GPIO_ODR_LOW)
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GPIO(LED2, PIN(155), GPIO_ODR_HIGH)
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GPIO(LED3, PIN(156), GPIO_ODR_LOW)
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GPIO(PCH_SMI_L, PIN(44), GPIO_ODR_HIGH) /* SMI output */
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GPIO(PCH_WAKE_L, PIN(200), GPIO_ODR_HIGH) /* PCH wake pin */
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/* Switch S1 */
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GPIO(S1, PIN(63), GPIO_INT_FALLING | GPIO_PULL_UP)
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/* Shared SPI CS */
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GPIO(SHD_CS0, PIN(150), GPIO_ODR_HIGH)
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/*
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* Signals which aren't implemented on MEC1322 eval board but we'll
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* emulate anyway, to make it more convenient to debug other code.
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*/
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UNIMPLEMENTED(RECOVERY_L) /* Recovery signal from DOWN button */
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UNIMPLEMENTED(WP_L) /* Write protect input */
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UNIMPLEMENTED(ENTERING_RW) /* EC entering RW code */
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ALTERNATE(PIN_MASK(16, 0x24), 1, MODULE_UART, 0) /* UART0 */
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ALTERNATE(PIN_MASK(3, (1 << 4)), 3, MODULE_PWM_FAN, 0)
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ALTERNATE(PIN_MASK(14, (1 << 0)), 3, MODULE_PWM_FAN, 0)
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/*
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* I2C0: External pull-up resistors on EVB are too weak. Let's
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* also enable internal pull-up here.
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*/
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ALTERNATE(PIN_MASK(1, 0x60), 2, MODULE_I2C, GPIO_PULL_UP)
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ALTERNATE(PIN_MASK(0, 0xfe), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
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ALTERNATE(PIN_MASK(1, 0x03), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
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ALTERNATE(PIN_MASK(3, 0x04), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
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ALTERNATE(PIN_MASK(4, 0x0d), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
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ALTERNATE(PIN_MASK(10, 0xd8), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
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ALTERNATE(PIN_MASK(12, 0x60), 2, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
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ALTERNATE(PIN_MASK(14, 0x14), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
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ALTERNATE(PIN_MASK(2, 0x20), 2, MODULE_LPC, 0)
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ALTERNATE(PIN_MASK(12, 0x14), 1, MODULE_SPI, 0)
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ALTERNATE(PIN_MASK(6, 0x10), 1, MODULE_SPI, 0)
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@@ -1,17 +0,0 @@
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/* -*- mode:c -*-
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*
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* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* Minimal set of GPIOs needed for LFW loader
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*/
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GPIO(PVT_CS0, PIN(146), GPIO_ODR_HIGH) /* SPI PVT Chip select */
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GPIO(SHD_CS0, PIN(150), GPIO_ODR_HIGH)
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/* Alternate functions GPIO definition */
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ALTERNATE(PIN_MASK(16, 0x24), 1, MODULE_UART, 0) /* UART0 */
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ALTERNATE(PIN_MASK(5, 0x10), 1, MODULE_SPI, 0)
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ALTERNATE(PIN_MASK(16, 0x10), 1, MODULE_SPI, 0)
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ALTERNATE(PIN_MASK(15, 0x08), 1, MODULE_SPI, 0) /* 153: CLK */
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