scottk/OpenCellular
1
0
Fork 0
mirror of https://github.com/Telecominfraproject/OpenCellular.git synced 2025-12-27 18:25:05 +00:00
Code Issues Packages Projects Releases Wiki Activity

mec1322: Compute hash for RW image by using the RW image resident in flash.

Browse Source 
BUG=chrome-os-partner:41063
TEST=Enable Software Sync in Coreboot and Depthcharge.
Enable hash computation in EC. Compile EC followed by
Coreboot and program Coreboot followed by EC on a Cyan
system. System should boot to Chrome Login Screen.
BRANCH=none

Change-Id: I4b53e9e55e4da279366eb1283a11a010c52b865f
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/276305
Reviewed-by: Shawn N <shawnn@chromium.org>
This commit is contained in:
Shamile Khan
2015-05-29 15:56:59 -07:00
committed by ChromeOS Commit Bot
parent 65adf18a63
commit b46faa6af7
2 changed files with 32 additions and 14 deletions
Download Patch File Download Diff File Expand all files Collapse all files

34
common/system.c
View File

@@ -14,6 +14,7 @@
#include "host_command.h"
#include "i2c.h"
#include "lpc.h"
#include "spi_flash.h"
#ifdef CONFIG_MPU
#include "mpu.h"
#endif
@@ -338,16 +339,13 @@ test_mockable enum system_image_copy_t system_get_image_copy(void)
int system_get_image_used(enum system_image_copy_t copy)
{
#if !defined(CONFIG_FLASH_MAPPED) && defined(CONFIG_CODERAM_ARCH)
int image_offset;
uint8_t buf[SPI_FLASH_MAX_WRITE_SIZE];
#endif
const uint8_t *image;
int size = 0;
/*
* TODO(crosbug.com/p/41063): Make this work on platforms with
* external, non-memmapped SPI flash.
*/
image = (const uint8_t *)get_program_memory_addr(copy);
int size;
size = get_size(copy);
if (size <= 0)
return 0;
@@ -356,8 +354,28 @@ int system_get_image_used(enum system_image_copy_t copy)
* last byte of the image. See ec.lds.S for how this is inserted at
* the end of the image.
*/
#if !defined(CONFIG_FLASH_MAPPED) && defined(CONFIG_CODERAM_ARCH)
image_offset = (copy == SYSTEM_IMAGE_RW) ? CONFIG_RW_STORAGE_OFF :
CONFIG_RO_STORAGE_OFF;
image = buf;
do {
if (image == buf) {
flash_read(image_offset + size -
SPI_FLASH_MAX_WRITE_SIZE,
SPI_FLASH_MAX_WRITE_SIZE, buf);
image = buf + SPI_FLASH_MAX_WRITE_SIZE;
}
image--, size--;
} while (*image != 0xea);
#else
image = (const uint8_t *)get_program_memory_addr(copy);
for (size--; size > 0 && image[size] != 0xea; size--)
;
#endif
return size ? size + 1 : 0; /* 0xea byte IS part of the image */
}

12
common/vboot_hash.c
View File

@@ -217,7 +217,7 @@ static void vboot_hash_init(void)
#endif
{
/* Start computing the hash of RW firmware */
vboot_hash_start(CONFIG_RW_MEM_OFF,
vboot_hash_start(CONFIG_RW_STORAGE_OFF,
system_get_image_used(SYSTEM_IMAGE_RW),
NULL, 0);
}
@@ -251,7 +251,7 @@ DECLARE_HOOK(HOOK_SYSJUMP, vboot_hash_preserve_state, HOOK_PRIO_DEFAULT);
#ifdef CONFIG_CMD_HASH
static int command_hash(int argc, char **argv)
{
uint32_t offset = CONFIG_RW_MEM_OFF;
uint32_t offset = CONFIG_RW_STORAGE_OFF;
uint32_t size = CONFIG_RW_SIZE;
char *e;
@@ -277,12 +277,12 @@ static int command_hash(int argc, char **argv)
return EC_SUCCESS;
} else if (!strcasecmp(argv[1], "rw")) {
return vboot_hash_start(
CONFIG_RW_MEM_OFF,
CONFIG_RW_STORAGE_OFF,
system_get_image_used(SYSTEM_IMAGE_RW),
NULL, 0);
} else if (!strcasecmp(argv[1], "ro")) {
return vboot_hash_start(
CONFIG_RO_MEM_OFF,
CONFIG_RO_STORAGE_OFF,
system_get_image_used(SYSTEM_IMAGE_RO),
NULL, 0);
}
@@ -354,10 +354,10 @@ static int host_start_hash(const struct ec_params_vboot_hash *p)
/* Handle special offset values */
if (offset == EC_VBOOT_HASH_OFFSET_RO) {
offset = CONFIG_RO_MEM_OFF;
offset = CONFIG_RO_STORAGE_OFF;
size = system_get_image_used(SYSTEM_IMAGE_RO);
} else if (p->offset == EC_VBOOT_HASH_OFFSET_RW) {
offset = CONFIG_RW_MEM_OFF;
offset = CONFIG_RW_STORAGE_OFF;
size = system_get_image_used(SYSTEM_IMAGE_RW);
}