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fix instruction address range limitation

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For the adr instruction, it require the label's offset from the
address of this instruction must be in the range +/-1MB. If the
option "BL2_IN_XIP_MEM" is set to '1', in some cases, BL2's RW
memory will not in the range of +/-1MB from BL2's RO memory region.
so we need to use ldr instruction to cover this case.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
This commit is contained in:
Jiafei Pan
2018-03-27 23:00:55 +08:00
parent 7d173fc594
commit b4ad976844
1 changed files with 2 additions and 2 deletions
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4
include/common/aarch64/el3_common_macros.S
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@@ -278,8 +278,8 @@
* an earlier boot loader stage.
* -------------------------------------------------------------
*/
adr x0, __RW_START__
adr x1, __RW_END__
ldr x0, =__RW_START__
ldr x1, =__RW_END__
sub x1, x1, x0
bl inv_dcache_range
#endif