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Fix a bug that ADC input is not correctly configured.

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The ADC input pin was always configured as BDS. Modified it to configure
the correct pin.

BUG=none
TEST=On Link, "rw 0x4002451C" show 0xff instead of 0xf7.

Change-Id: I1efd5cd59ad65f55cd673529afa6153add63ecac
This commit is contained in:
Vic Yang
2012-02-02 16:50:44 +08:00
parent 965987eeac
commit b7f2a18859
4 changed files with 40 additions and 6 deletions
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2
board/link/board.c
View File

@@ -109,7 +109,7 @@ const struct adc_t adc_channels[ADC_CH_COUNT] =
* = -225 * ADC_VALUE / ADC_READ_MAX + 420.5
*/
{"ECTemp", LM4_ADC_SEQ0, -225, ADC_READ_MAX, 420,
LM4_NO_AIN, 0x0e /* TS0 | IE0 | END0 */},
LM4_AIN_NONE, 0x0e /* TS0 | IE0 | END0 */},
/* Charger current is mapped from 0~4000mA to 0~1.6V.
* And ADC maps 0~3.3V to ADC_READ_MAX.

40
chip/lm4/adc.c
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@@ -15,17 +15,51 @@
extern const struct adc_t adc_channels[ADC_CH_COUNT];
/* GPIO port and mask for AINs. */
const uint32_t ain_port[24][2] = {
{LM4_GPIO_E, (1<<3)},
{LM4_GPIO_E, (1<<2)},
{LM4_GPIO_E, (1<<1)},
{LM4_GPIO_E, (1<<0)},
{LM4_GPIO_D, (1<<7)},
{LM4_GPIO_D, (1<<6)},
{LM4_GPIO_D, (1<<5)},
{LM4_GPIO_D, (1<<4)},
{LM4_GPIO_E, (1<<5)},
{LM4_GPIO_E, (1<<4)},
{LM4_GPIO_B, (1<<4)},
{LM4_GPIO_B, (1<<5)},
{LM4_GPIO_D, (1<<3)},
{LM4_GPIO_D, (1<<2)},
{LM4_GPIO_D, (1<<1)},
{LM4_GPIO_D, (1<<0)},
{LM4_GPIO_K, (1<<0)},
{LM4_GPIO_K, (1<<1)},
{LM4_GPIO_K, (1<<2)},
{LM4_GPIO_K, (1<<3)},
{LM4_GPIO_E, (1<<7)},
{LM4_GPIO_E, (1<<6)},
{LM4_GPIO_N, (1<<1)},
{LM4_GPIO_N, (1<<0)},
};
static void configure_gpio(void)
{
int i;
volatile uint32_t scratch __attribute__((unused));
/* Enable GPIOE module and delay a few clocks */
LM4_SYSTEM_RCGCGPIO |= 0x0010;
scratch = LM4_SYSTEM_RCGCGPIO;
/* Use analog function for PE3 (AIN0) */
LM4_GPIO_DEN(LM4_GPIO_E) &= ~0x08;
LM4_GPIO_AMSEL(LM4_GPIO_E) |= 0x08;
/* Use analog function for AIN */
for (i = 0; i < ADC_CH_COUNT; ++i) {
int id = adc_channels[i].channel;
if (id != LM4_AIN_NONE)
gpio_set_alternate_function(ain_port[id][0],
ain_port[id][1],
1);
}
}
int lm4_adc_flush_and_read(enum lm4_adc_sequencer seq)

3
chip/lm4/lm4_adc.h
View File

@@ -27,10 +27,9 @@ enum lm4_adc_sequencer
/* Just plain id mapping for code readability */
#define LM4_AIN(x) (x)
#define LM4_AIN_NONE (-1)
/* Dummy value for "channel" in adc_t if we don't have an external channel. */
#define LM4_NO_AIN 0
#define LM4_AIN_NONE (-1)
/* Flush an ADC sequencer and initiate a read. Return raw ADC value. */
int lm4_adc_flush_and_read(enum lm4_adc_sequencer);

1
include/adc.h
View File

@@ -10,6 +10,7 @@
#include "common.h"
#include "board.h"
#include "gpio.h"
/* Data structure to define ADC channels. */
struct adc_t