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Enable FPU support for Link EC

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With this CL, if CONFIG_FPU is defined (only for Link, ATM), the EC task
switcher will enable CONTROL.FPCA and expect all stack contexts to include
floating point state as well as normal state (an additional 18 words).

To support this, we need to increase the allocated stack space for each
task. The stack sizes are already chosen empirically, so I'm just rounding
them up a bit.

BUG=chrome-os-partner:14766
BRANCH=Link
TEST=manual

There should be no noticeable change. If you run the EC command "taskinfo"
you'll see the increased size each thread's stack, but everything that was
working before should continue to work just fine.

The additional overhead required to load and store another 18 words on each
context switch is not really measurable (I tried).

Change-Id: Ibaca7d7a2565285f049fda6906f32761e83207af
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/34391
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This commit is contained in:
Bill Richardson
2012-10-01 14:29:15 -07:00
committed by Gerrit
parent 56ce828309
commit bc50e0cabb
9 changed files with 35 additions and 67 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
board/link/ec.tasklist
View File

@@ -15,8 +15,8 @@
* 's' is the stack size in bytes; must be a multiple of 8
*/
#define CONFIG_TASK_LIST \
TASK(WATCHDOG, watchdog_task, NULL, 256) \
TASK(VBOOTHASH, vboot_hash_task, NULL, 512) \
TASK(WATCHDOG, watchdog_task, NULL, WATCHDOG_TASK_STACK_SIZE) \
TASK(VBOOTHASH, vboot_hash_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK(LIGHTBAR, lightbar_task, NULL, TASK_STACK_SIZE) \
TASK(POWERSTATE, charge_state_machine_task, NULL, TASK_STACK_SIZE) \
TASK(TEMPSENSOR, temp_sensor_task, NULL, TASK_STACK_SIZE) \
@@ -26,6 +26,6 @@
TASK(X86POWER, x86_power_task, NULL, TASK_STACK_SIZE) \
TASK(I8042CMD, i8042_command_task, NULL, TASK_STACK_SIZE) \
TASK(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
TASK(CONSOLE, console_task, NULL, TASK_STACK_SIZE) \
TASK(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK(POWERBTN, power_button_task, NULL, TASK_STACK_SIZE) \
TASK(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE)

8
chip/lm4/config.h
View File

@@ -24,11 +24,13 @@
/* System stack size */
#define CONFIG_STACK_SIZE 4096
/* Idle task stack size */
#define IDLE_TASK_STACK_SIZE 320
/* non-standard task stack sizes */
#define IDLE_TASK_STACK_SIZE 384
#define WATCHDOG_TASK_STACK_SIZE 256
#define LARGER_TASK_STACK_SIZE 640
/* Default task stack size */
#define TASK_STACK_SIZE 488
#define TASK_STACK_SIZE 512
#define CONFIG_FLASH_BASE 0x00000000
#define CONFIG_FLASH_BANK_SIZE 0x00000800 /* protect bank size */

5
common/tmp006.c
View File

@@ -8,7 +8,6 @@
#include "board.h"
#include "config.h"
#include "console.h"
#include "fpu.h"
#include "gpio.h"
#include "hooks.h"
#include "i2c.h"
@@ -57,8 +56,6 @@ static int tmp006_calculate_object_temp(int Tdie_i, int Vobj_i, int S0_i)
float Tx, S, Vos, Vx, fv, Tobj, T4;
int Tobj_i;
enable_fpu();
Tdie = (float)Tdie_i * 1e-2f;
Vobj = (float)Vobj_i * 1e-9f;
S0 = (float)S0_i * 1e-17f;
@@ -77,8 +74,6 @@ static int tmp006_calculate_object_temp(int Tdie_i, int Vobj_i, int S0_i)
Tobj = sqrtf(sqrtf(T4));
Tobj_i = (int32_t)(Tobj * 100.0f);
disable_fpu(Tobj_i);
return Tobj_i;
#else
/* This is the fixed-point version of object temperature calculation.

1
core/cortex-m/build.mk
View File

@@ -14,5 +14,4 @@ CFLAGS_CPU=-mcpu=cortex-m4 -mthumb -Os -mno-sched-prolog
CFLAGS_CPU+=$(CFLAGS_FPU-y)
core-y=cpu.o init.o panic.o switch.o task.o timer.o
core-$(CONFIG_FPU)+=fpu.o
core-$(CONFIG_TASK_WATCHDOG)+=watchdog.o

29
core/cortex-m/fpu.c
View File

@@ -1,29 +0,0 @@
/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* FPU module for Chrome EC operating system */
#include "task.h"
void enable_fpu(void)
{
interrupt_disable();
asm volatile("mrs r0, control;"
"orr r0, r0, #(1 << 2);"
"msr control, r0;"
"isb;");
}
void disable_fpu(int32_t v)
{
/* Optimization barrier to force compiler generate floating point
* calculation code for 'v' before disabling FPU. */
asm volatile("" : : "r" (v) : "memory");
asm volatile("mrs r0, control;"
"bic r0, r0, #(1 << 2);"
"msr control, r0;"
"isb;");
interrupt_enable();
}

8
core/cortex-m/init.S
View File

@@ -305,8 +305,12 @@ reset:
/* Ensure we're in privileged mode with main stack.
* Necessary if we've jumped directly here from another image
* after task_start(). */
mov r0, #0
msr control, r0 @ use : priv. mode / main stack / no floating point
#ifdef CONFIG_FPU
mov r0, #(1 << 2) @ priv. mode / main stack / floating point on
#else
mov r0, #0 @ priv. mode / main stack / no floating point
#endif
msr control, r0
isb @ ensure the write is done
/* Set the vector table on our current code */
ldr r1, =vectors

12
core/cortex-m/switch.S
View File

@@ -35,8 +35,8 @@
__switchto:
mrs r3, psp @ get the task stack where the context has been saved
ldr r2, [r1] @ get the new scheduled task stack pointer
stmdb r3!, {r4-r11} @ save additional r4-r7 in the task stack
ldmia r2!, {r4-r11} @ restore r4-r7 for the next task context
stmdb r3!, {r4-r11} @ save additional r4-r11 in the task stack
ldmia r2!, {r4-r11} @ restore r4-r11 for the next task context
str r3, [r0] @ save the task stack pointer in its context
msr psp, r2 @ set the process stack pointer to exception context
bx lr @ return from exception
@@ -49,13 +49,17 @@ __switchto:
.thumb_func
__task_start:
ldr r2,=scratchpad @ area used as dummy thread stack for the first switch
mov r3, #2
#ifdef CONFIG_FPU
mov r3, #6 @ use : priv. mode / thread stack / floating point on
#else
mov r3, #2 @ use : priv. mode / thread stack / no floating point
#endif
add r2, #17*4 @ put the pointer at the top of the stack
mov r1, #0 @ __Schedule parameter : re-schedule nothing
msr psp, r2 @ setup a thread stack up to the first context switch
mov r2, #1
isb @ ensure the write is done
msr control, r3 @ use : priv. mode / thread stack / no floating point
msr control, r3
mov r3, r0
mov r0, #0 @ __Schedule parameter : de-schedule nothing
isb @ ensure the write is done

14
core/cortex-m/task.c
View File

@@ -120,7 +120,11 @@ uint8_t task_stacks[0
#undef TASK
/* Reserve space to discard context on first context switch. */
#ifdef CONFIG_FPU
uint32_t scratchpad[17+18];
#else
uint32_t scratchpad[17];
#endif
static task_ *current_task = (task_ *)scratchpad;
@@ -573,8 +577,16 @@ int task_pre_init(void)
tasks[i].stack = stack_next;
/* Update stack used by first frame (16 uint32's) */
/*
* Update stack used by first frame: 8 words for the normal
* stack, plus 8 for R4-R11. With FP enabled, we need another
* 18 words for S0-S15 and FPCSR and to align to 64-bit.
*/
#ifdef CONFIG_FPU
sp = stack_next + ssize - 16 - 18;
#else
sp = stack_next + ssize - 16;
#endif
tasks[i].sp = (uint32_t)sp;
/* Initial context on stack (see __switchto()) */

19
include/fpu.h
View File

@@ -1,19 +0,0 @@
/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* FPU module for Chrome EC operating system */
#ifndef __EC_FPU_H
#define __EC_FPU_H
/* Enables FPU. Note that this function also disables interrupt. */
void enable_fpu(void);
/* Disables FPU. This function also enables interrupt.
* The value passed in serves as optimization barrier. This value would be
* calculated before FPU is disabled regardless of compiler optimization. */
void disable_fpu(int32_t);
#endif /* __EC_FPU_H */