scottk/OpenCellular
1
0
Fork 0
mirror of https://github.com/Telecominfraproject/OpenCellular.git synced 2026-01-15 08:57:42 +00:00
Code Issues Packages Projects Releases Wiki Activity

lpc: Removing unnecessary register writes

Browse Source 
According to Nuvoton datasheet, when SHM windows are in IO mode, only the
bottom 16-bits of registers @ offset xF4 and xF8 are used.

"This register is ignored when WRAM1_IO bit in WIN_CFG register is set to
1 (LPC / eSPI Peripheral Channel I/O access with 16-bit address). This
register is set to its default value by Host Domain reset."

BRANCH=none
BUG=none
TEST=boot grunt and verify host communication still works.

Change-Id: I3e48ea1b09355eaf6967b9f7522bc3d35459b76b
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/919006
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
This commit is contained in:
Jett Rink
2018-02-14 16:02:23 -07:00
committed by chrome-bot
parent 9fb49a0df1
commit bdcbd67fc2
1 changed files with 1 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
chip/npcx/lpc.c
View File

@@ -765,14 +765,9 @@ void host_register_init(void)
/* WIN1&2 mapping to IO */
lpc_sib_write_reg(SIO_OFFSET, 0xF1,
lpc_sib_read_reg(SIO_OFFSET, 0xF1) | 0x30);
/* Host Command on the IO:0x0800 */
lpc_sib_write_reg(SIO_OFFSET, 0xF7, 0x00);
lpc_sib_write_reg(SIO_OFFSET, 0xF6, 0x00);
/* WIN1 as Host Command on the IO:0x0800 */
lpc_sib_write_reg(SIO_OFFSET, 0xF5, 0x08);
lpc_sib_write_reg(SIO_OFFSET, 0xF4, 0x00);
/* WIN1 as Host Command on the IO:0x0800 */
lpc_sib_write_reg(SIO_OFFSET, 0xFB, 0x00);
lpc_sib_write_reg(SIO_OFFSET, 0xFA, 0x00);
/* WIN2 as MEMMAP on the IO:0x900 */
lpc_sib_write_reg(SIO_OFFSET, 0xF9, 0x09);
lpc_sib_write_reg(SIO_OFFSET, 0xF8, 0x00);