cr50: added cr50 a1 chip

cr50_a1 is for cr50 Rev A1 chip.

BUG=chrome-os-partner:33432
BRANCH=none
TEST=Compile Only

Change-Id: I5490d1a5b89fa66c8e8b969cff7538a293a7d053
Signed-off-by: Sheng-Liang Song <ssl@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/259847
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>

board/cr50/build.mk

@@ -6,6 +6,8 @@
 # Board specific files build
 
 CHIP:=g
+CHIP_FAMILY:=cr50
+CHIP_VARIANT:=cr50_fpga
 
 board-y=board.o
 

board/cr50_a1/Makefile

@@ -0,0 +1 @@
+../../Makefile

board/cr50_a1/board.c

@@ -0,0 +1,51 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "common.h"
+#include "console.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "registers.h"
+#include "task.h"
+#include "util.h"
+
+/*
+ * There's no way to trigger on both rising and falling edges, so force a
+ * compiler error if we try. The workaround is to use the pinmux to connect
+ * two GPIOs to the same input and configure each one for a separate edge.
+ */
+#undef GPIO_INT_BOTH
+#define GPIO_INT_BOTH NOT_SUPPORTED_ON_CR50
+
+#include "gpio_list.h"
+
+/* Interrupt handler for button pushes */
+void button_event(enum gpio_signal signal)
+{
+	int v;
+
+	/* We have two GPIOs on the same input (one rising edge, one falling
+	 * edge), so de-alias them */
+	if (signal >= GPIO_SW_N_)
+		signal -= (GPIO_SW_N_ - GPIO_SW_N);
+
+	v = gpio_get_level(signal);
+	ccprintf("Button %d = %d\n", signal, v);
+	gpio_set_level(signal - GPIO_SW_N + GPIO_LED_4, v);
+}
+
+/* Initialize board. */
+static void board_init(void)
+{
+	gpio_enable_interrupt(GPIO_SW_N);
+	gpio_enable_interrupt(GPIO_SW_S);
+	gpio_enable_interrupt(GPIO_SW_W);
+	gpio_enable_interrupt(GPIO_SW_E);
+	gpio_enable_interrupt(GPIO_SW_N_);
+	gpio_enable_interrupt(GPIO_SW_S_);
+	gpio_enable_interrupt(GPIO_SW_W_);
+	gpio_enable_interrupt(GPIO_SW_E_);
+}
+DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);

board/cr50_a1/board.h

@@ -0,0 +1,38 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __BOARD_H
+#define __BOARD_H
+
+/* Features that we don't want just yet */
+#undef CONFIG_CMD_LID_ANGLE
+#undef CONFIG_CMD_POWERINDEBUG
+#undef CONFIG_DMA_DEFAULT_HANDLERS
+#undef CONFIG_FLASH
+#undef CONFIG_FMAP
+#undef CONFIG_HIBERNATE
+#undef CONFIG_LID_SWITCH
+
+/*
+ * Allow dangerous commands all the time, since we don't have a write protect
+ * switch.
+ */
+#define CONFIG_SYSTEM_UNLOCKED
+
+/* Not using software sync, so verify RW signature instead */
+#define CONFIG_RWSIG
+#define CONFIG_RSA
+#define CONFIG_SHA256
+
+#ifndef __ASSEMBLER__
+
+#include "gpio_signal.h"
+
+/* user button interrupt handler */
+void button_event(enum gpio_signal signal);
+
+#endif /* !__ASSEMBLER__ */
+
+#endif /* __BOARD_H */

board/cr50_a1/build.mk

@@ -0,0 +1,15 @@
+# -*- makefile -*-
+# Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Board specific files build
+
+CHIP:=g
+CHIP_FAMILY:=cr50
+CHIP_VARIANT:=cr50_a1
+
+board-y=board.o
+
+# Need to generate a .hex file
+all: hex

board/cr50_a1/dev_key.pem

@@ -0,0 +1,27 @@
+-----BEGIN RSA PRIVATE KEY-----
+MIIEogIBAAKCAQEAsaHkxeqOorLS8/Ixp43ZnPnJ+ItBIbX4AkmKFLZyLus9NaFX
+j2r+qIM0Daxsaq/qvtlnRNrQ313XH/F5e1xrdTcC4VovR8Q4wXh+hEw4Nhcz2U/c
+daZMaBJUZlYEHpi2R9UXcflDS68oE5GNJT5EuGfqdpvStTFMU33Bv7cxgf3lQg2c
+fhMoNNjTxzzR+ta0lmaQLZ7kh6IOIb0SoTmANvmtANPdIC4NTHk43KSRTShOTYRs
+b7pbOrFq+7bmDWhgfHv7Y34Y2f0LouXlzJEfGnlpXYOX5WA9H9XMbBGwhjKNq5R6
+YHW069FyT6G28VceY+i3SMdgoEgyNPn/GHK02wIDAQABAoIBAAX35JHp0aUR0Ri1
+OInisD8f/XNGaofRb2XURrlvb+K3sLTOmPyOocPTtLoI4xOqmX6UG24q0/3NT18Z
+Y/WLI2kq0gP0XcZRh36op8eWMAVRPkK89jFVxxdwFjniBf1pMCa1uDXyJBq05enS
+aCWqM/DmPPCDR88iuufLP+lLJHSznt2vDjbONcU+MVtuymrBkYR/APPSl7CPNmF4
+WPhWoVbj5tgOO5XUTU/wFRLgnD2FfPiS0g26AKeriJWTeD2dZHFcmJAoFxs1du18
+1r4yAZveEcT+RgVsXa9L+/OTd+uuPVzlgEBhyP2xSiFN9TMPlpBdsWrDtx4ZFnQV
+ajMVeGECgYEA11TbaI6G5xEhCaz+11v8UYIX1V9KXTJz1fuy4qyItduf27O3egAO
+KhUu8nxTpj2JTj65ZPWlTahLF5UKuyAbOmyP5OZBSmZHqfATMh8jEz50mfTWgtew
+KzswTtslXV8ekaVBta+aNUJrptqtpVK9PpE1yAOjmw42vk3YgbL4pzkCgYEA0y5P
+R3u0pS9ZFfI7cFOFBZm2B+e6Md2P/8zmyzJakIQhHVbAWkhc6BIocUe0xSVG0ceq
+3n2QPfkmWrZrUSp+5n9ouaC8ixqWrHU7xbGHLklWsq+WpI0PvNTftPS9akVJV4D9
+xD1K8lpPQuakuOmctUco2G4p1LSwbfQqwe48CLMCgYAanR5RGeyKeo9+xqborzHM
+USvo71IdmrK+a9F8Op7a+z4SxW+T4JXflaarybn8/fYOeaooVEQOCRLe40jkP9+d
+pPVT8TF4pJOO6WE1/Ks1Ia7/qEcq/MWFUldyJ5vCopMApVAtyHpiwsbTZIu5tzQ0
+m3XuNqTt8R/K/YwY26nn4QKBgB3gl2bNoakdIcVxF+e0aUV5kb9ckYMsjYrrOlvV
+K+r2RpkYBO7A/iP3LbGZK4IY3AQh85K2wQmDjmGXHWfGU13Y+MAKdaJYiKitjV9S
+1oU96v4syWtOacOVenDnj0TRuKagoUZ6RXg0PrKAXx2qL3mWL7kvHMvzJGLqAIKf
+ae7xAoGAClWOT/hzzUROAVYIYszYUXrVAtCC896m8b8VRG1kL3GL/pOyKoqvVybi
+Mx9V1mi/oFcBA2MGDAaJUJEQ7JYih/go3auzEmL3zQHzeLofaldFjOt2kN1ff6UF
+HKyS+l/Ub1NVhHkXoVZpo6spKyMG/iPm4qr+rIvkwwfF1e2OADU=
+-----END RSA PRIVATE KEY-----

board/cr50_a1/ec.tasklist

@@ -0,0 +1,21 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/**
+ * List of enabled tasks in the priority order
+ *
+ * The first one has the lowest priority.
+ *
+ * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
+ * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
+ * where :
+ * 'n' in the name of the task
+ * 'r' in the main routine of the task
+ * 'd' in an opaque parameter passed to the routine at startup
+ * 's' is the stack size in bytes; must be a multiple of 8
+ */
+#define CONFIG_TASK_LIST \
+	TASK_ALWAYS(HOOKS, hook_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE)

board/cr50_a1/gpio.inc

@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Inputs with interrupt handlers are first for efficiency */
+
+/* User Push buttons */
+GPIO(SW_N,   0, 0, GPIO_INT_RISING, button_event)
+GPIO(SW_S,   0, 1, GPIO_INT_RISING, button_event)
+GPIO(SW_W,   0, 2, GPIO_INT_RISING, button_event)
+GPIO(SW_E,   0, 3, GPIO_INT_RISING, button_event)
+
+/* We can't trigger on both rising and falling edge, so attach each button
+ * to two input GPIOs. */
+GPIO(SW_N_,   1, 0, GPIO_INT_FALLING, button_event)
+GPIO(SW_S_,   1, 1, GPIO_INT_FALLING, button_event)
+GPIO(SW_W_,   1, 2, GPIO_INT_FALLING, button_event)
+GPIO(SW_E_,   1, 3, GPIO_INT_FALLING, button_event)
+
+/* User GPIO LEDs */
+GPIO(LED_2,  0, 4, GPIO_OUT_LOW, NULL)
+GPIO(LED_3,  0, 5, GPIO_OUT_LOW, NULL)
+GPIO(LED_4,  0, 6, GPIO_OUT_LOW, NULL)
+GPIO(LED_5,  0, 7, GPIO_OUT_LOW, NULL)
+GPIO(LED_6,  0, 8, GPIO_OUT_LOW, NULL)
+GPIO(LED_7,  0, 9, GPIO_OUT_LOW, NULL)
+
+/* Unimplemented signals which we need to emulate for now */
+UNIMPLEMENTED(ENTERING_RW)
+
+/* The Cr50 ARM core has no alternate functions, so we repurpose that
+ * macro to describe the PINMUX setup. The args are
+ *
+ * 1. The ARM core GPIO or SoC peripheral function to connect
+ * 2. The pinmux DIO pad to connect to
+ * 3. <ignored>
+ * 4. MODULE_GPIO, to prevent being called by gpio_config_module()
+ * 5. flags to specify the direction if the GPIO isn't enough
+ */
+
+/* The serial port is one of the SoC peripheral functions */
+ALTERNATE(FUNC(UART0_TX), DIO(A0), 0, MODULE_GPIO, DIO_OUTPUT)
+ALTERNATE(FUNC(UART0_RX), DIO(A1), 0, MODULE_GPIO, DIO_INPUT)
+
+/* Inputs */
+ALTERNATE(SW_N,           DIO(M0), 0, MODULE_GPIO, 0)
+ALTERNATE(SW_S,           DIO(M1), 0, MODULE_GPIO, 0)
+ALTERNATE(SW_W,           DIO(M2), 0, MODULE_GPIO, 0)
+ALTERNATE(SW_E,           DIO(M3), 0, MODULE_GPIO, 0)
+
+/* Aliased Inputs, connected to the same pins */
+ALTERNATE(SW_N_,           DIO(M0), 0, MODULE_GPIO, 0)
+ALTERNATE(SW_S_,           DIO(M1), 0, MODULE_GPIO, 0)
+ALTERNATE(SW_W_,           DIO(M2), 0, MODULE_GPIO, 0)
+ALTERNATE(SW_E_,           DIO(M3), 0, MODULE_GPIO, 0)
+
+/* Outputs - also mark as inputs so we can read back from the driven pin */
+ALTERNATE(LED_2,          DIO(A9),    0, MODULE_GPIO, DIO_INPUT)
+ALTERNATE(LED_3,          DIO(A10),   0, MODULE_GPIO, DIO_INPUT)
+ALTERNATE(LED_4,          DIO(A11),   0, MODULE_GPIO, DIO_INPUT)
+ALTERNATE(LED_5,          DIO(A12),   0, MODULE_GPIO, DIO_INPUT)
+ALTERNATE(LED_6,          DIO(A13),   0, MODULE_GPIO, DIO_INPUT)
+ALTERNATE(LED_7,          DIO(A14),   0, MODULE_GPIO, DIO_INPUT)

chip/g/build.mk

@@ -11,7 +11,7 @@ CFLAGS_CPU+=-march=armv7-m -mcpu=cortex-m3
 ver_defs := GC___MAJOR_REV__ GC___MINOR_REV__
 bld_defs := GC_SWDP_BUILD_DATE_DEFAULT GC_SWDP_BUILD_TIME_DEFAULT
 ver_params := $(shell echo "$(ver_defs) $(bld_defs)" | $(CPP) $(CPPFLAGS) -P \
-                -imacros chip/g/gc_regdefs.h | sed -e "s/__REV\([A-Z]\)__/\1/")
+                -imacros chip/g/${CHIP_VARIANT}_regdefs.h | sed -e "s/__REV\([A-Z]\)__/\1/")
 ver_str := $(shell printf "%s%s %d_%d" $(ver_params))
 CPPFLAGS+= -DGC_REVISION="$(ver_str)"
 

chip/g/registers.h

@@ -7,9 +7,22 @@
 #define __CROS_EC_REGISTERS_H
 
 #include "common.h"
-#include "gc_regdefs.h"
+#if defined(CHIP_VARIANT_CR50_FPGA)
+#include "cr50_fpga_regdefs.h"
+#define PCLK_FREQ  30000000
+#elif defined(CHIP_VARIANT_CR50_A1)
+#include "cr50_a1_regdefs.h"
+#define PCLK_FREQ  24000000
+#else
+#error "Unsupported CR50 chip variant"
+#endif
+
 #include "util.h"
 
+/* Constants for setting baud rate */
+#define DEFAULT_UART_FREQ 1000000
+#define UART_NCO_WIDTH 16
+
 /* Replace masked bits with val << lsb */
 #define REG_WRITE_MLV(reg, mask, lsb, val) reg = ((reg & ~mask) | ((val << lsb) & mask))
 

chip/g/uart.c

@@ -124,11 +124,6 @@ void uart_ec_rx_interrupt(void)
 }
 DECLARE_IRQ(GC_IRQNUM_UART0_RXINT, uart_ec_rx_interrupt, 1);
 
-/* Constants for setting baud rate */
-#define PCLK_FREQ  30000000
-#define DEFAULT_UART_FREQ 1000000
-#define UART_NCO_WIDTH 16
-
 void uart_init(void)
 {
 	long long setting = (16 * (1 << UART_NCO_WIDTH) *