g: Provide a pinhold interface

This change is required to reboot the chip without bringing down the
entire platform on boards where GPIOs are wired to external active reset
signals.

BRANCH=none
BUG=none
TEST=Scoped a pin across a reset.

Change-Id: I58d93697d39a8adcdac9324d5dd9da00745aec9a
Signed-off-by: Nadim Taha <ntaha@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/644179
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
This commit is contained in:
Nadim Taha
2017-08-30 13:54:08 -07:00
committed by Nadim Taha
parent aeea9974b2
commit be96cd65ed
2 changed files with 36 additions and 1 deletions

View File

@@ -16,6 +16,8 @@
#include "task.h"
#include "version.h"
static uint8_t pinhold_on_reset;
static void check_reset_cause(void)
{
uint32_t g_rstsrc = GR_PMU_RSTSRC;
@@ -86,6 +88,21 @@ void system_pre_init(void)
GREG32(GLOBALSEC, FLASH_REGION0_CTRL_CFG_EN) = 0;
}
void system_pinhold_disengage(void)
{
GREG32(PINMUX, HOLD) = 0;
}
void system_pinhold_on_reset_enable(void)
{
pinhold_on_reset = 1;
}
void system_pinhold_on_reset_disable(void)
{
pinhold_on_reset = 0;
}
void system_reset(int flags)
{
/* Disable interrupts to avoid task swaps during reboot */
@@ -106,7 +123,6 @@ void system_reset(int flags)
*/
GR_PMU_GLOBAL_RESET = GC_PMU_GLOBAL_RESET_KEY;
#else
if (flags & SYSTEM_RESET_HARD) {
/* Reset the full microcontroller */
GR_PMU_GLOBAL_RESET = GC_PMU_GLOBAL_RESET_KEY;
@@ -116,6 +132,9 @@ void system_reset(int flags)
* state. To accomplish this, first register a wakeup
* timer and then enter lower power mode. */
if (pinhold_on_reset)
GREG32(PINMUX, HOLD) = 1;
/* Low speed timers continue to run in low power mode. */
GREG32(TIMELS, TIMER1_CONTROL) = 0x1;
/* Wait for this long. */

View File

@@ -74,4 +74,20 @@ void system_get_rollback_bits(char *value, size_t value_size);
*/
void system_ensure_rollback(void);
/**
* Enables holding external pins across soft chip resets. Application firmware
* is responsible for disengaging pinhold upon reset.
*/
void system_pinhold_on_reset_enable(void);
/**
* Disables holding external pins across soft chip resets.
*/
void system_pinhold_on_reset_disable(void);
/**
* Disengages pinhold if engaged.
*/
void system_pinhold_disengage(void);
#endif /* __CROS_EC_SYSTEM_CHIP_H */