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cr50: enable deep sleep on Bob

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Enable deep sleep on rk3399 devices and start using SYS_RST_L to track
the AP state.

We can only release this once the EC has the proper support. It needs to
assert SYS_RST_L in S5.

If we have an old EC and this change in the Cr50 firmware, Cr50 won't be
able to tell when the AP is off. I think this will just cause an
interrupt storm on the AP UART and might not go into regular sleep in
S5.

If the EC change gets released before Cr50, Cr50 won't go to sleep in
S5, because SYS_RST_L is a wake on low pin. Cr50 will immediately wake
up from the SYS_RST_L pin when it enters sleep.

BUG=b:35647982
BRANCH=cr50
TEST=run firmware_Cr50DeepSleepStress on Bob

Change-Id: Iaf46f46eb5963e9479bba40457253a6ccc91ad32
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/699295
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This commit is contained in:
Mary Ruthven
2017-09-07 12:44:10 -07:00
committed by chrome-bot
parent 179c624133
commit c1ad33b24d
1 changed files with 1 additions and 2 deletions
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3
board/cr50/board.c
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@@ -236,8 +236,7 @@ const struct strap_desc strap_regs[] = {
static struct board_cfg board_cfg_table[] = {
/* SPI Variants: DIOA12 = 1M PD, DIOA6 = 1M PD */
/* Kevin/Gru: DI0A9 = 5k PD, DIOA1 = 1M PU */
{ 0x02, BOARD_SLAVE_CONFIG_SPI | BOARD_NEEDS_SYS_RST_PULL_UP |
BOARD_DEEP_SLEEP_DISABLED | BOARD_DETECT_AP_WITH_UART },
{ 0x02, BOARD_SLAVE_CONFIG_SPI | BOARD_NEEDS_SYS_RST_PULL_UP },
/* Poppy: DI0A9 = 1M PU, DIOA1 = 1M PU */
{ 0x0A, BOARD_SLAVE_CONFIG_SPI | BOARD_USE_PLT_RESET },