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Increase cold reset hibernate time to 200ms

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The hardware fix for issue 16600 adds RC delays to ENABLE_5VALW, so
that +5VALW stays on during a warm reset of the EC.  In the worst
case, +5VALW will drop around 150ms, which could then move the +3VALW
glitch right into the time frame where the EC is booting following
hibernate.

Increase the cold reset hibernate time from 150ms to 200ms.  This
ensures that +5VALW has dropped before the EC comes out of hibernate.

BUG=chrome-os-partner:16600
BRANCH=link
TEST=manual

From the EC console, 'reboot cold' a bunch of times.  The system
shouldn't hang.  (Alternately, you can 'ectool reboot_ec cold' a bunch
of times)

Change-Id: I4bebdb552b8e917c6345badd6efb68b10d7d1f86
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/39340
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This commit is contained in:
Randall Spangler
2012-12-06 15:46:28 -08:00
committed by Gerrit
parent 3d0d2adb63
commit c26a242e94
1 changed files with 2 additions and 2 deletions
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4
chip/lm4/system.c
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@@ -35,9 +35,9 @@ enum hibdata_index {
/*
* Time to hibernate to trigger a power-on reset. 50 ms is sufficient for the
* EC itself, but we need a longer delay to ensure the rest of the components
* on the same power rail are reset.
* on the same power rail are reset and 5VALW has dropped.
*/
#define HIB_RESET_USEC 150000
#define HIB_RESET_USEC 200000
/**
* Wait for a write to commit to a hibernate register.