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Clean up SPI GPIOs

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SPI is always enabled on pit, so remove #ifdefs

SPI1_CLK was aliased to AC_STATUS, which is left over from snow and
doesn't exist on pit.  That caused it to be driven high briefly during
EC boot.

Also set SPI pins for 40MHz speed so we can try faster SPI clock.

BUG=chrome-os-partner:19304
BRANCH=none
TEST=boot system; sspi 2:0 256 9f prints a bunch of FDs then FEEC010001

Change-Id: I10352cff3669d6a087939d9d8e302d70708e9ee3
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51023
Reviewed-by: Doug Anderson <dianders@chromium.org>
This commit is contained in:
Randall Spangler
2013-05-13 13:39:57 -07:00
committed by ChromeBot
parent 7188b6f413
commit c882edb530
3 changed files with 2 additions and 20 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
board/pit/board.c
View File

@@ -50,7 +50,6 @@ const struct gpio_info gpio_list[GPIO_COUNT] = {
{"AC_PWRBTN_L", GPIO_A, (1<<0), GPIO_INT_BOTH, NULL},
{"WP_L", GPIO_B, (1<<4), GPIO_INPUT, NULL},
/* Outputs */
{"AC_STATUS", GPIO_A, (1<<5), GPIO_OUT_HIGH, NULL},
{"AP_RESET_L", GPIO_B, (1<<3), GPIO_HI_Z, NULL},
{"CHARGER_EN", GPIO_B, (1<<2), GPIO_OUT_LOW, NULL},
{"EC_INT", GPIO_B, (1<<9), GPIO_HI_Z, NULL},
@@ -65,9 +64,6 @@ const struct gpio_info gpio_list[GPIO_COUNT] = {
{"LED_POWER_L", GPIO_A, (1<<2), GPIO_OUT_HIGH, NULL},
{"PMIC_PWRON", GPIO_A, (1<<12), GPIO_OUT_LOW, NULL},
{"PMIC_RESET", GPIO_A, (1<<15), GPIO_OUT_LOW, NULL},
#ifndef CONFIG_SPI
{"SPI1_MISO", GPIO_A, (1<<6), GPIO_OUT_HIGH, NULL},
#endif
{"KB_OUT00", GPIO_B, (1<<0), GPIO_KB_OUTPUT, NULL},
{"KB_OUT01", GPIO_B, (1<<8), GPIO_KB_OUTPUT, NULL},
{"KB_OUT02", GPIO_B, (1<<12), GPIO_KB_OUTPUT, NULL},
@@ -102,15 +98,12 @@ void board_config_post_gpio_init(void)
/* TIM2_CH2 on PB3 */
gpio_set_alternate_function(GPIO_B, (1 << 3), GPIO_ALT_TIM2);
#ifdef CONFIG_SPI
/* SPI1 on pins PA4-7 */
gpio_set_alternate_function(GPIO_A,
(1 << 4) | (1 << 5) | (1 << 6) | (1 << 7),
GPIO_ALT_SPI);
/* 10 MHz pin speed */
STM32_GPIO_OSPEEDR(GPIO_A) = (STM32_GPIO_OSPEEDR(GPIO_A) & ~0xff00) |
0xaa00;
#endif
/* 40 MHz pin speed */
STM32_GPIO_OSPEEDR(GPIO_A) |= 0xff00;
}
#ifdef CONFIG_PMU_BOARD_INIT

4
board/pit/board.h
View File

@@ -99,7 +99,6 @@ enum gpio_signal {
GPIO_AC_PWRBTN_L,
GPIO_WP_L,
/* Outputs */
GPIO_AC_STATUS,
GPIO_AP_RESET_L,
GPIO_CHARGER_EN,
GPIO_EC_INT,
@@ -114,9 +113,6 @@ enum gpio_signal {
GPIO_LED_POWER_L,
GPIO_PMIC_PWRON,
GPIO_PMIC_RESET,
#ifndef CONFIG_SPI
GPIO_SPI1_MISO,
#endif
GPIO_KB_OUT00,
GPIO_KB_OUT01,
GPIO_KB_OUT02,

7
common/pmu_tps65090_charger.c
View File

@@ -393,10 +393,6 @@ void charger_task(void)
/* Enable charger interrupt */
gpio_enable_interrupt(GPIO_CHARGER_INT);
#ifdef CONFIG_AC_POWER_STATUS
gpio_set_flags(GPIO_AC_STATUS, GPIO_OUT_HIGH);
#endif
/*
* EC STOP mode support
* The charging loop can be stopped in idle state with AC unplugged.
@@ -544,9 +540,6 @@ DECLARE_HOOK(HOOK_CHIPSET_RESUME, pmu_chipset_events, HOOK_PRIO_DEFAULT);
void pmu_irq_handler(enum gpio_signal signal)
{
#ifdef CONFIG_AC_POWER_STATUS
gpio_set_level(GPIO_AC_STATUS, extpower_is_present());
#endif
pmu_task_throttled_wake();
CPRINTF("Charger IRQ received.\n");
}