mirror of
https://github.com/Telecominfraproject/OpenCellular.git
synced 2026-01-11 18:35:28 +00:00
Add constants for all GPIOs.
Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7528 TEST=none Change-Id: I3b77cbbb7f0cc12a4daae7ababd603b5d7af32d1
This commit is contained in:
@@ -10,24 +10,4 @@
|
||||
|
||||
void configure_board(void)
|
||||
{
|
||||
/* Enable all of the GPIO modules : GPIOA to GPIOQ */
|
||||
LM4_SYSTEM_RCGCGPIO = 0x7fff;
|
||||
|
||||
/* GPIOA muxing :
|
||||
* pins 0/1 : UART0 = function 1
|
||||
* pins 2/3/4/5 : SSI0 = function 2
|
||||
* pin 6 : GPIO = function 0 (SD card CS -- open drain)
|
||||
* pin 7 : GPIO = function 0 (user LED)
|
||||
*/
|
||||
LM4_GPIO_PCTL(LM4_GPIO_A) = 0x00222211;
|
||||
LM4_GPIO_AFSEL(LM4_GPIO_A) = 0x3f;
|
||||
LM4_GPIO_DEN(LM4_GPIO_A) = 0xff;
|
||||
LM4_GPIO_PDR(LM4_GPIO_A) = 0x00;
|
||||
LM4_GPIO_PUR(LM4_GPIO_A) = 0x3c;
|
||||
LM4_GPIO_DIR(LM4_GPIO_A) = 0xc0;
|
||||
LM4_GPIO_ODR(LM4_GPIO_A) = 0x40;
|
||||
LM4_GPIO_DR2R(LM4_GPIO_A) = 0xc3;
|
||||
LM4_GPIO_DR8R(LM4_GPIO_A) = 0x3c;
|
||||
LM4_GPIO_DATA(LM4_GPIO_A, 0x40) = 0x40;
|
||||
LM4_GPIO_DATA(LM4_GPIO_A, 0x80) = 0;
|
||||
}
|
||||
|
||||
@@ -10,13 +10,4 @@
|
||||
|
||||
void configure_board(void)
|
||||
{
|
||||
/* Enable all of the GPIO modules : GPIOA to GPIOQ */
|
||||
LM4_SYSTEM_RCGCGPIO = 0x7fff;
|
||||
|
||||
/* GPIOA muxing :
|
||||
* pins 0/1 : UART0 = function 1
|
||||
*/
|
||||
LM4_GPIO_PCTL(LM4_GPIO_A) = 0x00000011;
|
||||
LM4_GPIO_AFSEL(LM4_GPIO_A) = 0x03;
|
||||
LM4_GPIO_DEN(LM4_GPIO_A) = 0x03;
|
||||
}
|
||||
|
||||
@@ -63,7 +63,7 @@ static int command_sleep(int argc, char **argv)
|
||||
clock = strtoi(argv[2], NULL, 10);
|
||||
}
|
||||
/* remove LED current sink */
|
||||
gpio_set_level(EC_GPIO_DEBUG_LED, 0);
|
||||
gpio_set_level(GPIO_DEBUG_LED, 0);
|
||||
|
||||
uart_printf("Going to sleep : level %d clock %d...\n", level, clock);
|
||||
uart_flush_output();
|
||||
|
||||
@@ -27,20 +27,70 @@ struct gpio_info {
|
||||
#define SIGNAL_NOT_IMPLEMENTED(name) {name, LM4_GPIO_A, 0x00, NULL}
|
||||
|
||||
/* Signal information. Must match order from enum gpio_signal. */
|
||||
const struct gpio_info signal_info[EC_GPIO_COUNT] = {
|
||||
/* Signals with interrupt handlers */
|
||||
{"POWER_BUTTON", LM4_GPIO_C, 0x20, power_button_interrupt},
|
||||
{"LID_SWITCH", LM4_GPIO_D, 0x01, power_button_interrupt},
|
||||
/* Other signals */
|
||||
const struct gpio_info signal_info[GPIO_COUNT] = {
|
||||
/* Inputs with interrupt handlers are first for efficiency */
|
||||
{"POWER_BUTTONn", LM4_GPIO_C, 0x20, power_button_interrupt},
|
||||
{"LID_SWITCHn", LM4_GPIO_D, 0x01, power_button_interrupt},
|
||||
SIGNAL_NOT_IMPLEMENTED("POWER_ONEWIRE"),
|
||||
SIGNAL_NOT_IMPLEMENTED("THERMAL_DATA_READYn"),
|
||||
/* Other inputs */
|
||||
SIGNAL_NOT_IMPLEMENTED("AC_PRESENT"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_BKLTEN"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_SLP_An"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_SLP_ME_CSW_DEVn"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_SLP_S3n"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_SLP_S4n"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_SLP_S5n"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_SLP_SUSn"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_SUSWARNn"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PGOOD_1_5V_DDR"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PGOOD_1_5V_PCH"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PGOOD_1_8VS"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PGOOD_5VALW"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PGOOD_CPU_CORE"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PGOOD_VCCP"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PGOOD_VCCSA"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PGOOD_VGFX_CORE"),
|
||||
SIGNAL_NOT_IMPLEMENTED("RECOVERYn"),
|
||||
SIGNAL_NOT_IMPLEMENTED("USB1_STATUSn"),
|
||||
SIGNAL_NOT_IMPLEMENTED("USB2_STATUSn"),
|
||||
SIGNAL_NOT_IMPLEMENTED("WRITE_PROTECTn"),
|
||||
/* Outputs */
|
||||
SIGNAL_NOT_IMPLEMENTED("CPU_PROCHOTn"),
|
||||
{"DEBUG_LED", LM4_GPIO_A, 0x80, NULL},
|
||||
SIGNAL_NOT_IMPLEMENTED("POWER_BUTTON_OUT"),
|
||||
SIGNAL_NOT_IMPLEMENTED("LID_SWITCH_OUT"),
|
||||
SIGNAL_NOT_IMPLEMENTED("ENABLE_1_5V_DDR"),
|
||||
SIGNAL_NOT_IMPLEMENTED("ENABLE_BACKLIGHT"),
|
||||
SIGNAL_NOT_IMPLEMENTED("ENABLE_VCORE"),
|
||||
SIGNAL_NOT_IMPLEMENTED("ENABLE_VS"),
|
||||
SIGNAL_NOT_IMPLEMENTED("ENTERING_RW"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_A20GATE"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_DPWROK"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_HDA_SDO"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_LID_SWITCHn"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_NMIn"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_PWRBTNn"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_PWROK"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_RCINn"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_RSMRSTn"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_SMIn"),
|
||||
SIGNAL_NOT_IMPLEMENTED("PCH_SUSACKn"),
|
||||
SIGNAL_NOT_IMPLEMENTED("SHUNT_1_5V_DDR"),
|
||||
SIGNAL_NOT_IMPLEMENTED("USB1_CTL1"),
|
||||
SIGNAL_NOT_IMPLEMENTED("USB1_CTL2"),
|
||||
SIGNAL_NOT_IMPLEMENTED("USB1_CTL3"),
|
||||
SIGNAL_NOT_IMPLEMENTED("USB1_ENABLE"),
|
||||
SIGNAL_NOT_IMPLEMENTED("USB1_ILIM_SEL"),
|
||||
SIGNAL_NOT_IMPLEMENTED("USB2_CTL1"),
|
||||
SIGNAL_NOT_IMPLEMENTED("USB2_CTL2"),
|
||||
SIGNAL_NOT_IMPLEMENTED("USB2_CTL3"),
|
||||
SIGNAL_NOT_IMPLEMENTED("USB2_ENABLE"),
|
||||
SIGNAL_NOT_IMPLEMENTED("USB2_ILIM_SEL"),
|
||||
};
|
||||
|
||||
#undef SIGNAL_NOT_IMPLEMENTED
|
||||
|
||||
|
||||
/* Find a GPIO signal by name. Returns the signal index, or EC_GPIO_COUNT if
|
||||
/* Find a GPIO signal by name. Returns the signal index, or GPIO_COUNT if
|
||||
* no match. */
|
||||
static enum gpio_signal find_signal_by_name(const char *name)
|
||||
{
|
||||
@@ -48,24 +98,25 @@ static enum gpio_signal find_signal_by_name(const char *name)
|
||||
int i;
|
||||
|
||||
if (!name || !*name)
|
||||
return EC_GPIO_COUNT;
|
||||
return GPIO_COUNT;
|
||||
|
||||
for (i = 0; i < EC_GPIO_COUNT; i++, g++) {
|
||||
for (i = 0; i < GPIO_COUNT; i++, g++) {
|
||||
if (!strcasecmp(name, g->name))
|
||||
return i;
|
||||
}
|
||||
|
||||
return EC_GPIO_COUNT;
|
||||
return GPIO_COUNT;
|
||||
}
|
||||
|
||||
|
||||
int gpio_pre_init(void)
|
||||
{
|
||||
/* Enable clock to GPIO block A */
|
||||
LM4_SYSTEM_RCGCGPIO |= 0x0001;
|
||||
/* Enable clocks to the GPIO blocks we use. Bits are encoded this way;
|
||||
* blocks we use are in caps: .qpn mlkj hgfe DCbA */
|
||||
LM4_SYSTEM_RCGCGPIO |= 0x000d;
|
||||
|
||||
/* Turn off the LED before we make it an output */
|
||||
gpio_set_level(EC_GPIO_DEBUG_LED, 0);
|
||||
gpio_set_level(GPIO_DEBUG_LED, 0);
|
||||
|
||||
/* Clear GPIOAFSEL bits for block A pin 7 */
|
||||
LM4_GPIO_AFSEL(LM4_GPIO_A) &= ~(0x80);
|
||||
@@ -149,7 +200,7 @@ static void gpio_interrupt(int port, uint32_t mis)
|
||||
int i = 0;
|
||||
const struct gpio_info *g = signal_info;
|
||||
|
||||
for (i = 0; i < EC_GPIO_COUNT; i++, g++) {
|
||||
for (i = 0; i < GPIO_COUNT; i++, g++) {
|
||||
if (port == g->port && (mis & g->mask) && g->irq_handler)
|
||||
g->irq_handler(i);
|
||||
}
|
||||
@@ -176,11 +227,13 @@ static int command_gpio_get(int argc, char **argv)
|
||||
int i;
|
||||
|
||||
uart_puts("Current GPIO levels:\n");
|
||||
for (i = 0; i < EC_GPIO_COUNT; i++, g++) {
|
||||
for (i = 0; i < GPIO_COUNT; i++, g++) {
|
||||
if (g->mask)
|
||||
uart_printf(" %d %s\n", gpio_get_level(i), g->name);
|
||||
else
|
||||
uart_printf(" - %s\n", g->name);
|
||||
/* We'd overflow the output buffer without flushing */
|
||||
uart_flush_output();
|
||||
}
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
@@ -197,7 +250,7 @@ static int command_gpio_set(int argc, char **argv)
|
||||
}
|
||||
|
||||
i = find_signal_by_name(argv[1]);
|
||||
if (i == EC_GPIO_COUNT) {
|
||||
if (i == GPIO_COUNT) {
|
||||
uart_puts("Unknown signal name.\n");
|
||||
return EC_ERROR_UNKNOWN;
|
||||
}
|
||||
|
||||
@@ -9,6 +9,9 @@
|
||||
|
||||
int jtag_pre_init(void)
|
||||
{
|
||||
/* Enable clocks to GPIO block C */
|
||||
LM4_SYSTEM_RCGCGPIO |= 0x0004;
|
||||
|
||||
/* Ensure PC0:3 are set to JTAG function. They should be set this way
|
||||
* on a cold boot, but on a warm reboot a previous misbehaving image
|
||||
* could have set them differently. */
|
||||
|
||||
@@ -50,8 +50,8 @@ static void lid_switch_isr(void)
|
||||
/* TODO: Currently we pass through the LID_SW# pin to R_EC_LID_OUT#
|
||||
* directly. Modify this if we need to consider more conditions. */
|
||||
#ifdef BOARD_bds
|
||||
gpio_set_level(EC_GPIO_LID_SWITCH_OUT,
|
||||
gpio_get_level(EC_GPIO_LID_SWITCH));
|
||||
gpio_set_level(GPIO_PCH_LID_SWITCHn,
|
||||
gpio_get_level(GPIO_LID_SWITCHn));
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -69,7 +69,7 @@ static void lid_switch_isr(void)
|
||||
static void set_pwrbtn_to_pch(int high)
|
||||
{
|
||||
#ifdef BOARD_link
|
||||
gpio_set_level(EC_GPIO_POWER_BUTTON_OUT, high);
|
||||
gpio_set_level(GPIO_PCH_PWRBTN, high);
|
||||
#else
|
||||
uart_printf("[%d] set_pwrbtn_to_pch(%s)\n",
|
||||
get_time().le.lo, high ? "HIGH" : "LOW");
|
||||
@@ -128,7 +128,7 @@ static void pwrbtn_sm_handle(timestamp_t current)
|
||||
|
||||
static void power_button_isr(void)
|
||||
{
|
||||
if (!gpio_get_level(EC_GPIO_POWER_BUTTON)) {
|
||||
if (!gpio_get_level(GPIO_POWER_BUTTONn)) {
|
||||
/* pressed */
|
||||
pwrbtn_sm_start();
|
||||
/* TODO: implement after chip/lm4/x86_power.c is completed. */
|
||||
@@ -147,7 +147,7 @@ static void power_button_isr(void)
|
||||
void power_button_interrupt(enum gpio_signal signal)
|
||||
{
|
||||
timestamp_t timelimit;
|
||||
int d = (signal == EC_GPIO_LID_SWITCH ? DEBOUNCE_LID : DEBOUNCE_PWRBTN);
|
||||
int d = (signal == GPIO_LID_SWITCHn ? DEBOUNCE_LID : DEBOUNCE_PWRBTN);
|
||||
|
||||
/* TODO: (crosbug.com/p/7456) there's currently a race condition where
|
||||
* we can get an interrupt before clock_init() has been called. In
|
||||
|
||||
@@ -38,10 +38,10 @@
|
||||
void UserLedBlink(void)
|
||||
{
|
||||
while (1) {
|
||||
gpio_set_level(EC_GPIO_DEBUG_LED, 1);
|
||||
gpio_set_level(GPIO_DEBUG_LED, 1);
|
||||
usleep(500000);
|
||||
watchdog_reload();
|
||||
gpio_set_level(EC_GPIO_DEBUG_LED, 0);
|
||||
gpio_set_level(GPIO_DEBUG_LED, 0);
|
||||
usleep(500000);
|
||||
watchdog_reload();
|
||||
}
|
||||
|
||||
@@ -11,16 +11,70 @@
|
||||
#include "common.h"
|
||||
|
||||
/* GPIO signal definitions. */
|
||||
/* TODO: the exact list is board-depdendent */
|
||||
enum gpio_signal {
|
||||
/* Signals with interrupt handlers are first for efficiency */
|
||||
EC_GPIO_POWER_BUTTON = 0, /* Power button */
|
||||
EC_GPIO_LID_SWITCH, /* Lid switch */
|
||||
/* Other signals */
|
||||
EC_GPIO_DEBUG_LED, /* Debug LED */
|
||||
EC_GPIO_POWER_BUTTON_OUT, /* Power button output to PCH */
|
||||
EC_GPIO_LID_SWITCH_OUT, /* Lid switch output to PCH */
|
||||
/* Inputs with interrupt handlers are first for efficiency */
|
||||
GPIO_POWER_BUTTONn = 0, /* Power button */
|
||||
GPIO_LID_SWITCHn, /* Lid switch */
|
||||
GPIO_POWER_ONEWIRE, /* 1-wire interface to power adapter LEDs */
|
||||
GPIO_THERMAL_DATA_READYn, /* Data ready from I2C thermal sensor */
|
||||
/* Other inputs */
|
||||
GPIO_AC_PRESENT, /* AC power present */
|
||||
GPIO_PCH_BKLTEN, /* Backlight enable signal from PCH */
|
||||
GPIO_PCH_SLP_An, /* SLP_A# signal from PCH */
|
||||
GPIO_PCH_SLP_ME_CSW_DEVn, /* SLP_ME_CSW_DEV# signal from PCH */
|
||||
GPIO_PCH_SLP_S3n, /* SLP_S3# signal from PCH */
|
||||
GPIO_PCH_SLP_S4n, /* SLP_S4# signal from PCH */
|
||||
GPIO_PCH_SLP_S5n, /* SLP_S5# signal from PCH */
|
||||
GPIO_PCH_SLP_SUSn, /* SLP_SUS# signal from PCH */
|
||||
GPIO_PCH_SUSWARNn, /* SUSWARN# signal from PCH */
|
||||
GPIO_PGOOD_1_5V_DDR, /* Power good on +1.5V_DDR */
|
||||
GPIO_PGOOD_1_5V_PCH, /* Power good on +1.5V_PCH */
|
||||
GPIO_PGOOD_1_8VS, /* Power good on +1.8VS */
|
||||
GPIO_PGOOD_5VALW, /* Power good on +5VALW */
|
||||
GPIO_PGOOD_CPU_CORE, /* Power good on +CPU_CORE */
|
||||
GPIO_PGOOD_VCCP, /* Power good on +VCCP */
|
||||
GPIO_PGOOD_VCCSA, /* Power good on +VCCSA */
|
||||
GPIO_PGOOD_VGFX_CORE, /* Power good on +VGFX_CORE */
|
||||
GPIO_RECOVERYn, /* Recovery signal from servo */
|
||||
GPIO_USB1_STATUSn, /* USB charger port 1 status output */
|
||||
GPIO_USB2_STATUSn, /* USB charger port 2 status output */
|
||||
GPIO_WRITE_PROTECTn, /* Write protect input */
|
||||
/* Outputs */
|
||||
GPIO_CPU_PROCHOTn, /* Force CPU to think it's overheated */
|
||||
GPIO_DEBUG_LED, /* Debug LED */
|
||||
GPIO_ENABLE_1_5V_DDR, /* Enable +1.5V_DDR supply */
|
||||
GPIO_ENABLE_BACKLIGHT, /* Enable backlight power */
|
||||
GPIO_ENABLE_VCORE, /* Enable +CPU_CORE and +VGFX_CORE */
|
||||
GPIO_ENABLE_VS, /* Enable VS power supplies */
|
||||
GPIO_ENTERING_RW, /* Indicate when EC is entering RW code */
|
||||
GPIO_PCH_A20GATE, /* A20GATE signal to PCH */
|
||||
GPIO_PCH_DPWROK, /* DPWROK signal to PCH */
|
||||
GPIO_PCH_HDA_SDO, /* HDA_SDO signal to PCH; when high, ME
|
||||
* ignores security descriptor */
|
||||
GPIO_PCH_LID_SWITCHn, /* Lid switch output to PCH */
|
||||
GPIO_PCH_NMIn, /* Non-maskable interrupt pin to PCH */
|
||||
GPIO_PCH_PWRBTNn, /* Power button output to PCH */
|
||||
GPIO_PCH_PWROK, /* PWROK / APWROK signals to PCH */
|
||||
GPIO_PCH_RCINn, /* RCIN# signal to PCH */
|
||||
GPIO_PCH_RSMRSTn, /* Reset PCH resume power plane logic */
|
||||
GPIO_PCH_SMIn, /* System management interrupt to PCH */
|
||||
GPIO_PCH_SUSACKn, /* Acknowledge PCH SUSWARN# signal */
|
||||
GPIO_SHUNT_1_5V_DDR, /* Shunt +1.5V_DDR; may also enable +3V_TP
|
||||
* depending on stuffing. */
|
||||
GPIO_USB1_CTL1, /* USB charger port 1 CTL1 output */
|
||||
GPIO_USB1_CTL2, /* USB charger port 1 CTL2 output */
|
||||
GPIO_USB1_CTL3, /* USB charger port 1 CTL3 output */
|
||||
GPIO_USB1_ENABLE, /* USB charger port 1 enable */
|
||||
GPIO_USB1_ILIM_SEL, /* USB charger port 1 ILIM_SEL output */
|
||||
GPIO_USB2_CTL1, /* USB charger port 2 CTL1 output */
|
||||
GPIO_USB2_CTL2, /* USB charger port 2 CTL2 output */
|
||||
GPIO_USB2_CTL3, /* USB charger port 2 CTL3 output */
|
||||
GPIO_USB2_ENABLE, /* USB charger port 2 enable */
|
||||
GPIO_USB2_ILIM_SEL, /* USB charger port 2 ILIM_SEL output */
|
||||
|
||||
/* Number of GPIOs; not an actual GPIO */
|
||||
EC_GPIO_COUNT
|
||||
GPIO_COUNT
|
||||
};
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user