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stm32f05x: Use correct erase block size of 1kB

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Change erase block size to the correct 1kB.

BUG=chrome-os-partner:41959
BRANCH=none
TEST=with following CL, test software sync to PD MCU on
glados.

Change-Id: I6252e6344e50f00249ab105a90febd15599c936f
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/307042
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This commit is contained in:
Alec Berg
2015-10-19 10:04:23 -07:00
committed by chrome-bot
parent 8acea1ec39
commit cb3e0ca786
1 changed files with 1 additions and 1 deletions
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2
chip/stm32/config-stm32f05x.h
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@@ -6,7 +6,7 @@
/* Memory mapping */
#define CONFIG_FLASH_SIZE (64 * 1024)
#define CONFIG_FLASH_BANK_SIZE 0x1000
#define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */
#define CONFIG_FLASH_ERASE_SIZE 0x0400 /* erase bank size */
#define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */
/* No page mode on STM32F, so no benefit to larger write sizes */