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reef: Enable high current on type-A ports by default

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BUG=chrome-os-partner:59309
BRANCH=none
TEST=Able to draw 1.5A from Type-A ports

Change-Id: I9c598f77a542650edf15f407ec4a10d0e7e7465e
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/411345
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
This commit is contained in:
Vijay Hiremath
2016-11-14 18:44:56 -08:00
committed by chrome-bot
parent 7618346aaa
commit cfe12b90bc
2 changed files with 2 additions and 1 deletions
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1
board/reef/board.h
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@@ -68,6 +68,7 @@
/* USB-A config */
#define CONFIG_USB_PORT_POWER_SMART
#define CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE USB_CHARGE_MODE_CDP
#define CONFIG_USB_PORT_POWER_SMART_SIMPLE
#undef CONFIG_USB_PORT_POWER_SMART_PORT_COUNT
#define CONFIG_USB_PORT_POWER_SMART_PORT_COUNT 1

2
board/reef/gpio.inc
View File

@@ -115,7 +115,7 @@ GPIO(PCH_RCIN_L, PIN(6, 1), GPIO_ODR_HIGH) /* SYS_RST_ODL */
/* FIXME: What, if anything, to do about EC_RST_ODL on VCC1_RST#? */
GPIO(CHARGER_RST_ODL, PIN(C, 0), GPIO_ODR_HIGH)
GPIO(USB_A_CHARGE_EN_L, PIN(4, 2), GPIO_OUT_HIGH)
GPIO(USB_A_CHARGE_EN_L, PIN(4, 2), GPIO_OUT_LOW)
GPIO(EN_USB_TCPC_PWR, PIN(C, 3), GPIO_OUT_LOW)
GPIO(USB1_ENABLE, PIN(4, 1), GPIO_OUT_LOW)