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Snow has write protect pin (PB4) wired to EC.

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Intend to keep fake_wp functions for test.

BUG=chrome-os-partner:9986
TEST=build only (success on link/snow/daisy/bds). Have no hardware to test.

Change-Id: I1e2ae923790d65b6c95819f5274dbe8c7f254429
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28793
Commit-Ready: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com>
Tested-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This commit is contained in:
Louis Yung-Chieh Lo
2012-07-31 17:30:19 +08:00
committed by Gerrit
parent 776374b028
commit d02cc2c961
5 changed files with 9 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
board/snow/board.c
View File

@@ -43,6 +43,7 @@ const struct gpio_info gpio_list[GPIO_COUNT] = {
{"CHARGER_INT", GPIO_C, (1<<4), GPIO_INT_RISING, NULL},
{"LID_OPEN", GPIO_C, (1<<13), GPIO_INT_RISING, gaia_lid_event},
{"SUSPEND_L", GPIO_A, (1<<7), GPIO_INT_BOTH, gaia_suspend_event},
{"WP_L", GPIO_B, (1<<4), GPIO_INPUT, NULL},
{"KB_IN00", GPIO_C, (1<<8), GPIO_KB_INPUT, matrix_interrupt},
{"KB_IN01", GPIO_C, (1<<9), GPIO_KB_INPUT, matrix_interrupt},
{"KB_IN02", GPIO_C, (1<<10), GPIO_KB_INPUT, matrix_interrupt},
@@ -260,4 +261,3 @@ void board_pmu_init(void)
}
}
#endif /* CONFIG_BOARD_PMU_INIT */

8
board/snow/board.h
View File

@@ -26,13 +26,6 @@
#define CONFIG_TASK_PROFILING
#define CONFIG_WATCHDOG_HELP
/* Allow dangerous commands all the time, since we don't have a write protect
* switch. */
/* TODO: (crosbug.com/p/9986) This is a serious security hole and should be
* removed in mass production. We add this to allow manual firmware update.
* Once we complete the vboot and autoupdate, we should remove this. */
#define CONFIG_SYSTEM_UNLOCKED
#ifndef __ASSEMBLER__
/* By default, enable all console messages except keyboard */
@@ -64,6 +57,7 @@ enum gpio_signal {
GPIO_CHARGER_INT,
GPIO_LID_OPEN, /* LID switch detection */
GPIO_SUSPEND_L, /* AP suspend/resume state */
GPIO_WRITE_PROTECTn, /* Write protection pin (low active) */
/* Keyboard inputs */
GPIO_KB_IN00,
GPIO_KB_IN01,

4
chip/stm32/flash-stm32f100.c
View File

@@ -551,8 +551,7 @@ uint32_t flash_get_protect(void)
int i;
int not_protected[2] = {0};
/* TODO (vpalatin) : write protect scheme for stm32 */
if (system_get_fake_wp())
if (system_get_fake_wp() || !gpio_get_level(GPIO_WRITE_PROTECTn))
flags |= EC_FLASH_PROTECT_GPIO_ASSERTED;
/* Read the current persist state from flash */
@@ -613,6 +612,7 @@ int flash_set_protect(uint32_t mask, uint32_t flags)
return retval;
}
/* TODO: crosbug.com/p/12036 */
static int command_set_fake_wp(int argc, char **argv)
{
int val;

2
chip/stm32/system.c
View File

@@ -287,12 +287,14 @@ const char *system_get_chip_revision(void)
}
/* TODO: crosbug.com/p/12036 */
int system_set_fake_wp(int val)
{
return bkpdata_write(BKPDATA_INDEX_FAKE_WP, (uint16_t)val);
}
/* TODO: crosbug.com/p/12036 */
int system_get_fake_wp(void)
{
return bkpdata_read(BKPDATA_INDEX_FAKE_WP);

6
common/system_common.c
View File

@@ -90,10 +90,10 @@ int system_is_locked(void)
/* System is explicitly unlocked */
return 0;
#elif defined(BOARD_link) && defined(CONFIG_FLASH)
#elif defined(CONFIG_FLASH)
/*
* On link, unlocked if write protect pin deasserted or read-only
* firmware is not protected.
* Unlocked if write protect pin deasserted or read-only firmware
* is not protected.
*/
if ((EC_FLASH_PROTECT_GPIO_ASSERTED | EC_FLASH_PROTECT_RO_NOW) &
~flash_get_protect())