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mec1322: fix flash_physical_read()
flashrom on target issues a salvo of flash read commands with small buffer size (128 bytes). Since there is no yield this starves other tasks/events including hooks and as result watchdog is never reloaded. This change makes read function yield to other tasks. In addition, spi_enable()/disable chaining leads to situations where a SPI can be disabled in the middle of transcation. This is addressed by keeping SPI permanently enabled in LFW entry function, as well as in RW/RO early init functions. BRANCH=None BUG=chrome-os-partner:38103 TEST=manual on Cyan, run flashrom -p ec -w xx in cycles, swaping xx so that flashrom does flash. Make sure there is no watchdog triggered Change-Id: Id5c50239a1d5c64054d7c660dd03b2be4678221c Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://chromium-review.googlesource.com/282111 Reviewed-by: Bernie Thompson <bhthompson@chromium.org> Commit-Queue: Bernie Thompson <bhthompson@chromium.org> Tested-by: Bernie Thompson <bhthompson@chromium.org>
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ChromeOS Commit Bot
parent
0c331e6fcb
commit
d2dabdae5d
@@ -28,7 +28,6 @@ int flash_physical_read(int offset, int size, char *data)
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offset += CONFIG_FLASH_BASE_SPI;
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spi_enable(1);
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for (i = 0; i < size; i += read_size) {
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read_size = MIN((size - i), SPI_FLASH_MAX_READ_SIZE);
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ret = spi_flash_read((uint8_t *)(data + i),
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@@ -36,8 +35,9 @@ int flash_physical_read(int offset, int size, char *data)
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read_size);
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if (ret != EC_SUCCESS)
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break;
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/* yield so other tasks get a chance to wake up */
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msleep(1);
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}
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spi_enable(0);
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return ret;
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}
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@@ -61,7 +61,6 @@ int flash_physical_write(int offset, int size, const char *data)
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if ((offset | size | (uint32_t)(uintptr_t)data) & 3)
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return EC_ERROR_INVAL;
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spi_enable(1);
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for (i = 0; i < size; i += write_size) {
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write_size = MIN((size - i), SPI_FLASH_MAX_WRITE_SIZE);
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ret = spi_flash_write(offset + i,
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@@ -70,7 +69,6 @@ int flash_physical_write(int offset, int size, const char *data)
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if (ret != EC_SUCCESS)
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break;
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}
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spi_enable(0);
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return ret;
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}
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@@ -87,9 +85,7 @@ int flash_physical_erase(int offset, int size)
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int ret;
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offset += CONFIG_FLASH_BASE_SPI;
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spi_enable(1);
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ret = spi_flash_erase(offset, size);
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spi_enable(0);
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return ret;
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}
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@@ -112,9 +108,7 @@ int flash_physical_get_protect(int bank)
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uint32_t addr = bank * CONFIG_FLASH_BANK_SIZE;
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int ret;
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spi_enable(1);
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ret = spi_flash_check_protect(addr, CONFIG_FLASH_BANK_SIZE);
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spi_enable(0);
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return ret;
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#else
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return 0;
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@@ -147,9 +141,7 @@ int flash_physical_protect_now(int all)
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size = CONFIG_WP_SIZE;
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}
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spi_enable(1);
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ret = spi_flash_set_protect(offset, size);
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spi_enable(0);
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return ret;
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#else
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return 0;
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@@ -175,14 +167,12 @@ uint32_t flash_physical_get_protect_flags(void)
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* scenarios
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*/
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spi_enable(1);
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if (spi_flash_check_protect(CONFIG_RO_STORAGE_OFF, CONFIG_RO_SIZE)) {
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flags |= EC_FLASH_PROTECT_RO_AT_BOOT | EC_FLASH_PROTECT_RO_NOW;
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if (spi_flash_check_protect(CONFIG_RW_STORAGE_OFF,
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CONFIG_RW_SIZE))
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flags |= EC_FLASH_PROTECT_ALL_NOW;
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}
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spi_enable(0);
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#endif
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return flags;
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}
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@@ -264,9 +254,7 @@ int flash_physical_protect_at_boot(enum flash_wp_range range)
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break;
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}
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spi_enable(1);
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ret = spi_flash_set_protect(offset, size);
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spi_enable(0);
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return ret;
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#else
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return 0;
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@@ -89,15 +89,11 @@ int spi_image_load(uint32_t offset)
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memset((void *)buf, 0xFF, (CONFIG_FW_IMAGE_SIZE - 4));
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spi_enable(1);
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for (i = 0; i < CONFIG_FW_IMAGE_SIZE; i += SPI_CHUNK_SIZE)
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spi_flash_readloc(&buf[i],
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offset + i,
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SPI_CHUNK_SIZE);
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spi_enable(0);
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return 0;
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}
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@@ -235,6 +231,7 @@ void lfw_main()
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dma_init();
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uart_init();
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system_init();
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spi_enable(1);
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uart_puts("littlefw");
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uart_puts(version_data.version);
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@@ -18,6 +18,7 @@
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#include "task.h"
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#include "timer.h"
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#include "util.h"
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#include "spi.h"
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/* Indices for hibernate data registers (RAM backed by VBAT) */
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enum hibdata_index {
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@@ -118,6 +119,8 @@ void system_pre_init(void)
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MEC1322_VBAT_RAM(MEC1322_IMAGETYPE_IDX) = 0;
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check_reset_cause();
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spi_enable(1);
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}
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void _system_reset(int flags, int wake_from_hibernate)
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