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power: skylake: Delay 10ms before deasserting PCH_RSMRST_L

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According to spec, RSMRST shouldn't be deasserted until 10ms after power
signals become active.

BUG=chrome-os-partner:41556
TEST=Manual on Glados. Verify that AP boots to S0 on power-on, goes to
G3 on apshutdown, and back to S0 on powerbtn.
BRANCH=None

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I0acc897fff7c18ad83fc87734569ec7639ae5cf4
Reviewed-on: https://chromium-review.googlesource.com/280571
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Shawn Nematbakhsh
2015-06-18 15:31:21 -07:00
committed by ChromeOS Commit Bot
parent 104f811e67
commit d5c318329a
1 changed files with 17 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
power/skylake.c
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@@ -118,7 +118,23 @@ enum power_state power_chipset_init(void)
enum power_state power_handle_state(enum power_state state)
{
gpio_set_level(GPIO_PCH_RSMRST_L, gpio_get_level(GPIO_RSMRST_L_PGOOD));
/*
* Pass through RSMRST asynchronously, as PCH may not react
* immediately to power changes.
*/
int rsmrst_in = gpio_get_level(GPIO_RSMRST_L_PGOOD);
int rsmrst_out = gpio_get_level(GPIO_PCH_RSMRST_L);
if (rsmrst_in != rsmrst_out) {
/*
* Wait at least 10ms between power signals going high
* and deasserting RSMRST to PCH.
*/
if (rsmrst_in)
msleep(10);
gpio_set_level(GPIO_PCH_RSMRST_L, rsmrst_in);
CPRINTS("RSMRST: %d", rsmrst_in);
}
switch (state) {
case POWER_G3: