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reef: correct GPIO name for PMIC_EN signal pin

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Rename from V5A_EN to PMIC_EN.

The name V5A_EN came from Amenia where it controls both
5V_A-Rail and PMIC_EN.

Reef has a separate 5V_A-Rail control (EN_PP5000) and
an another GPIO pin for PMIC_EN.

BUG=chrome-os-partner:53666
BRANCH=none
TEST=buildall pass

Change-Id: Ic5e39b9811a6cf0e968c1d6262b9b9f849268ed4
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/354767
Reviewed-by: David Hendricks <dhendrix@chromium.org>
This commit is contained in:
Kevin K Wong
2016-06-22 10:33:12 -07:00
committed by chrome-bot
parent 11c156aedd
commit df7642329f
3 changed files with 7 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
board/reef/board.c
View File

@@ -300,9 +300,9 @@ static void board_init(void)
gpio_set_level(GPIO_EN_PP5000, 0);
/* Toggle PMIC_EN */
gpio_set_level(GPIO_V5A_EN, 1);
gpio_set_level(GPIO_PMIC_EN, 1);
msleep(500);
gpio_set_level(GPIO_V5A_EN, 0);
gpio_set_level(GPIO_PMIC_EN, 0);
}
/* FIXME: Handle tablet mode */
@@ -316,7 +316,7 @@ static void board_init(void)
* 1. PP5000 must be enabled before PP3300 (chrome-os-partner:50807).
* 2. TCPC chips must be powered until we can re-factor the PD handling
* code to be aware of TCPCs being off (chrome-os-partner:53644).
* 3. To prevent SLP glitches, PMIC_EN (V5A_EN) should be enabled
* 3. To prevent SLP glitches, PMIC_EN should be enabled
* at the same time as PP3300 (chrome-os-partner:51323).
*/
/* Enable PP5000 before PP3300 due to NFC: chrome-os-partner:50807 */
@@ -325,7 +325,7 @@ static void board_init(void)
;
/* Enable PMIC */
gpio_set_level(GPIO_V5A_EN, 1);
gpio_set_level(GPIO_PMIC_EN, 1);
/* Enable 3.3V rail */
gpio_set_level(GPIO_EN_PP3300, 1);
@@ -452,7 +452,7 @@ void chipset_do_shutdown(void)
/*
* If we shut off TCPCs the TCPC tasks will fail and spam the
* EC console with I2C errors. So for now we'll leave the TCPCs
* on which means leaving V5A_EN, PP3300, and PP5000 enabled.
* on which means leaving PMIC_EN, PP3300, and PP5000 enabled.
*/
cprintf(CC_CHIPSET, "%s called, but not doing anything.\n", __func__);
}

2
board/reef/gpio.inc
View File

@@ -81,7 +81,7 @@ GPIO(USB_C0_CABLE_DET, PIN(C, 5), GPIO_INPUT)
GPIO(PCH_RSMRST_L, PIN(7, 0), GPIO_OUT_LOW)
GPIO(EC_BATT_PRES_L, PIN(3, 4), GPIO_INPUT)
GPIO(V5A_EN, PIN(8, 5), GPIO_OUT_LOW) /* PMIC_EN */
GPIO(PMIC_EN, PIN(8, 5), GPIO_OUT_LOW)
GPIO(EN_PP3300, PIN(C, 2), GPIO_OUT_LOW)
GPIO(PP3300_PG, PIN(6, 2), GPIO_INPUT)
GPIO(EN_PP5000, PIN(C, 6), GPIO_OUT_LOW)

2
board/reef/usb_pd_policy.c
View File

@@ -153,7 +153,7 @@ int pd_check_data_swap(int port, int data_role)
int pd_check_vconn_swap(int port)
{
/* in G3, do not allow vconn swap since pp5000_A rail is off */
return gpio_get_level(GPIO_V5A_EN);
return gpio_get_level(GPIO_EN_PP5000);
}
void pd_execute_data_swap(int port, int data_role)