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Assert that group0/group1 counter config is what we expect
Before suspend the AMU counters should be enabled and after resume
they should be disabled. Assert that to be consistent with the
AArch64 implementation of `amu_context_{save,restore}()`.
Change-Id: Ia46f77e4062b93afb93721a2890a9b9d2a7f300e
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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@@ -109,7 +109,8 @@ static void *amu_context_save(const void *arg)
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ctx = &amu_ctxs[plat_my_core_pos()];
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/* Assert that group 0 counter configuration is what we expect */
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assert(read_amcntenset0() == AMU_GROUP0_COUNTERS_MASK);
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assert(read_amcntenset0() == AMU_GROUP0_COUNTERS_MASK &&
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read_amcntenset1() == AMU_GROUP1_COUNTERS_MASK);
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/*
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* Disable group 0 counters to avoid other observers like SCP sampling
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@@ -141,7 +142,7 @@ static void *amu_context_restore(const void *arg)
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ctx = &amu_ctxs[plat_my_core_pos()];
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/* Counters were disabled in `amu_context_save()` */
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assert(read_amcntenset0() == 0);
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assert(read_amcntenset0() == 0 && read_amcntenset1() == 0);
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/* Restore group 0 counters */
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for (i = 0; i < AMU_GROUP0_NR_COUNTERS; i++)
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