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apollolake: ignore PLTRST# from SOC unless RSMRST# is deasserted

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add optional chipset specific function to check if PLTRST# is valid

BUG=chrome-os-partner:52656
BRANCH=none
TEST=make buildall, able to boot to OS on amenia

Change-Id: I7a2747c4f77f50393c3250c2ab0e1625e64e5a41
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/341732
Reviewed-by: Shawn N <shawnn@chromium.org>
This commit is contained in:
Kevin K Wong
2016-05-02 16:17:42 -07:00
committed by chrome-bot
parent b6ad3710c4
commit e83c06bf90
3 changed files with 25 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
chip/npcx/lpc.c
View File

@@ -6,6 +6,7 @@
/* LPC module for Chrome EC */
#include "acpi.h"
#include "chipset.h"
#include "clock.h"
#include "common.h"
#include "console.h"
@@ -756,11 +757,9 @@ void lpc_lreset_pltrst_handler(void)
/* Clear pending bit of WUI */
SET_BIT(NPCX_WKPCL(MIWU_TABLE_0 , MIWU_GROUP_5), 7);
#ifdef GPIO_PCH_RSMRST_L
/* Ignore PLTRST# from SOC unless RSMRST# to soc is deasserted */
if (!gpio_get_level(GPIO_PCH_RSMRST_L))
/* Ignore PLTRST# from SOC if it is not valid */
if (chipset_pltrst_is_valid && !chipset_pltrst_is_valid())
return;
#endif
ccprintf("[%T PLTRST deasserted]\n");

7
include/chipset.h
View File

@@ -101,4 +101,11 @@ static inline void power_interrupt(enum gpio_signal signal) { }
#endif /* !HAS_TASK_CHIPSET */
/**
* Optional chipset check if PLTRST# is valid.
*
* @return non-zero if PLTRST# is valid, 0 if invalid.
*/
int chipset_pltrst_is_valid(void) __attribute__((weak));
#endif /* __CROS_EC_CHIPSET_H */

15
power/apollolake.c
View File

@@ -450,3 +450,18 @@ void power_signal_interrupt_S0(enum gpio_signal signal)
}
}
#endif
/**
* chipset check if PLTRST# is valid.
*
* @return non-zero if PLTRST# is valid, 0 if invalid.
*/
int chipset_pltrst_is_valid(void)
{
/*
* Invalid PLTRST# from SOC unless RSMRST#
* from PMIC through EC to soc is deasserted.
*/
return (gpio_get_level(GPIO_RSMRST_L_PGOOD) &&
gpio_get_level(GPIO_PCH_RSMRST_L));
}