mirror of
https://github.com/Telecominfraproject/OpenCellular.git
synced 2026-01-08 16:41:55 +00:00
Move reset/overheat/shutdown funcs to chipset interface
They're not x86-specific, so move to the chipset interface. BUG=chrome-os-partner:15579 BRANCH=none TEST=x86reset warm, then x86reset cold. Should reboot OS in each case. Change-Id: Ib571ab916bab16179198a0d054320e59afbae124 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36785
This commit is contained in:
@@ -5,6 +5,7 @@
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/* Keyboard scanner module for Chrome EC */
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#include "chipset.h"
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#include "common.h"
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#include "console.h"
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#include "host_command.h"
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@@ -17,7 +18,6 @@
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#include "task.h"
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#include "timer.h"
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#include "util.h"
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#include "x86_power.h"
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/* Console output macros */
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#define CPUTS(outstr) cputs(CC_KEYSCAN, outstr)
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@@ -202,7 +202,7 @@ static void check_runtime_keys(const uint8_t *state)
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if (state[MASK_INDEX_KEY_R] == MASK_VALUE_KEY_R) {
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/* R = reboot */
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CPRINTF("[%T KB warm reboot]\n");
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x86_power_reset(0);
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chipset_reset(0);
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} else if (state[MASK_INDEX_KEY_H] == MASK_VALUE_KEY_H) {
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/* H = hibernate */
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CPRINTF("[%T KB hibernate]\n");
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@@ -23,7 +23,6 @@
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#include "task.h"
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#include "timer.h"
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#include "util.h"
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#include "x86_power.h"
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/* Console output macros */
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#define CPUTS(outstr) cputs(CC_CHARGER, outstr)
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@@ -108,14 +107,9 @@ static void poweroff_wait_ac(int hibernate_ec)
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{
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/* Shutdown the main processor */
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if (chipset_in_state(CHIPSET_STATE_ON)) {
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/* chipset_force_state(CHIPSET_STATE_SOFT_OFF);
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* TODO(rong): remove platform dependent code
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*/
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#ifdef CONFIG_TASK_X86POWER
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CPRINTF("[%T force shutdown to avoid damaging battery]\n");
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x86_power_force_shutdown();
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chipset_force_shutdown();
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host_set_single_event(EC_HOST_EVENT_BATTERY_SHUTDOWN);
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#endif /* CONFIG_TASK_X86POWER */
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}
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/* If battery level is critical, hibernate the EC too */
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@@ -21,7 +21,6 @@
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#include "task.h"
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#include "timer.h"
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#include "util.h"
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#include "x86_power.h"
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#define KEYBOARD_DEBUG 1
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@@ -262,20 +261,11 @@ void keyboard_clear_underlying_buffer(void)
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i8042_flush_buffer();
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}
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/*
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* TODO: Move this implementation to platform-dependent files.
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* We don't do it now because not every board implement x86_power.c
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* bds: no CONFIG_LPC and no CONFIG_TASK_X86POWER
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* daisy(variants): no CONFIG_LPC and no CONFIG_TASK_X86POWER
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* crosbug.com/p/8523
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*/
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static void keyboard_wakeup(void)
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{
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host_set_single_event(EC_HOST_EVENT_KEY_PRESSED);
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}
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void keyboard_state_changed(int row, int col, int is_pressed)
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{
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uint8_t scan_code[MAX_SCAN_CODE_LEN];
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@@ -597,11 +587,9 @@ int handle_keyboard_command(uint8_t command, uint8_t *output)
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data_port_state = STATE_SEND_TO_MOUSE;
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break;
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#ifdef CONFIG_TASK_X86POWER
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case I8042_SYSTEM_RESET:
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x86_power_reset(0);
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chipset_reset(0);
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break;
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#endif
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default:
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if (command >= I8042_READ_CTL_RAM &&
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@@ -15,28 +15,14 @@
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static int mock_power_on = 0;
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void x86_power_cpu_overheated(int too_hot)
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{
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/* Print transitions */
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static int last_val = 0;
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if (too_hot != last_val) {
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if (too_hot)
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uart_printf("CPU overheated.\n");
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else
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uart_printf("CPU no longer overheated.\n");
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last_val = too_hot;
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}
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}
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void x86_power_force_shutdown(void)
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void chipset_force_shutdown(void)
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{
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uart_puts("Force shutdown\n");
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mock_power_on = 0;
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}
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void x86_power_reset(int cold_reset)
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void chipset_reset(int cold_reset)
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{
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uart_printf("X86 Power %s reset\n", cold_reset ? "cold" : "warm");
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}
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@@ -17,7 +17,10 @@
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#include "thermal.h"
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#include "timer.h"
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#include "util.h"
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#include "x86_power.h"
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/* Console output macros */
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#define CPUTS(outstr) cputs(CC_THERMAL, outstr)
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#define CPRINTF(format, args...) cprintf(CC_THERMAL, format, ## args)
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/*
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* Temperature threshold configuration. Must be in the same order as in enum
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@@ -103,18 +106,26 @@ static void smi_sensor_failure_warning(void)
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*/
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static void overheated_action(void)
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{
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static int cpu_down_count;
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if (overheated[THRESHOLD_POWER_DOWN]) {
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cprintf(CC_CHIPSET,
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"[%T critical temperature; shutting down]\n");
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x86_power_force_shutdown();
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chipset_force_shutdown();
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host_set_single_event(EC_HOST_EVENT_THERMAL_SHUTDOWN);
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return;
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}
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if (overheated[THRESHOLD_CPU_DOWN])
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x86_power_cpu_overheated(1);
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else
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x86_power_cpu_overheated(0);
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if (overheated[THRESHOLD_CPU_DOWN]) {
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cpu_down_count++;
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if (cpu_down_count > 3) {
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CPRINTF("[%T overheated; shutting down]\n");
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chipset_force_shutdown();
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host_set_single_event(EC_HOST_EVENT_THERMAL_SHUTDOWN);
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}
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} else {
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cpu_down_count = 0;
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}
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if (overheated[THRESHOLD_WARNING]) {
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smi_overheated_warning();
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@@ -190,25 +190,12 @@ static int wait_in_signals(uint32_t want)
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return EC_SUCCESS;
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}
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void x86_power_cpu_overheated(int too_hot)
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{
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static int overheat_count;
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/*****************************************************************************/
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/* Chipset interface */
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if (too_hot) {
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overheat_count++;
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if (overheat_count > 3) {
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CPRINTF("[%T overheated; shutting down]\n");
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x86_power_force_shutdown();
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host_set_single_event(EC_HOST_EVENT_THERMAL_SHUTDOWN);
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}
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} else {
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overheat_count = 0;
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}
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}
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void x86_power_force_shutdown(void)
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void chipset_force_shutdown(void)
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{
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CPRINTF("[%T x86 power force shutdown]\n");
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CPRINTF("[%T chipset force shutdown]\n");
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/*
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* Force x86 off. This condition will reset once the state machine
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@@ -218,7 +205,7 @@ void x86_power_force_shutdown(void)
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gpio_set_level(GPIO_PCH_RSMRSTn, 0);
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}
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void x86_power_reset(int cold_reset)
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void chipset_reset(int cold_reset)
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{
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if (cold_reset) {
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/*
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@@ -252,9 +239,6 @@ void x86_power_reset(int cold_reset)
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}
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}
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/*****************************************************************************/
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/* Chipset interface */
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int chipset_in_state(int state_mask)
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{
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int need_mask = 0;
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@@ -680,7 +664,7 @@ static int command_x86reset(int argc, char **argv)
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/* Force the x86 to reset */
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ccprintf("Issuing x86 %s reset...\n", is_cold ? "cold" : "warm");
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x86_power_reset(is_cold);
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chipset_reset(is_cold);
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return EC_SUCCESS;
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}
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DECLARE_CONSOLE_COMMAND(x86reset, command_x86reset,
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@@ -706,7 +690,7 @@ DECLARE_CONSOLE_COMMAND(powerinfo, command_powerinfo,
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static int command_x86shutdown(int argc, char **argv)
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{
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x86_power_force_shutdown();
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chipset_force_shutdown();
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return EC_SUCCESS;
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}
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DECLARE_CONSOLE_COMMAND(x86shutdown, command_x86shutdown,
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@@ -3,23 +3,27 @@
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* found in the LICENSE file.
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*/
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/* Chipset module for Chrome EC.
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/*
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* Chipset module for Chrome EC.
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*
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* This is intended to be a platform/chipset-neutral interface, implemented by
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* all main chipsets (x86, gaia, etc.). */
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* all main chipsets (x86, gaia, etc.).
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*/
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#ifndef __CROS_EC_CHIPSET_H
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#define __CROS_EC_CHIPSET_H
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#include "common.h"
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/* Chipset state mask
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/*
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* Chipset state mask
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*
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* Note that this is a non-exhaustive list of states which the main chipset can
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* be in, and is potentially one-to-many for real, underlying chipset states.
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* That's why chipset_in_state() asks "Is the chipset in something
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* approximating this state?" and not "Tell me what state the chipset is in and
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* I'll compare it myself with the state(s) I want." */
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* I'll compare it myself with the state(s) I want."
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*/
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enum chipset_state_mask {
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CHIPSET_STATE_HARD_OFF = 0x01, /* Hard off (G3) */
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CHIPSET_STATE_SOFT_OFF = 0x02, /* Soft off (S5) */
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@@ -30,15 +34,45 @@ enum chipset_state_mask {
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CHIPSET_STATE_SOFT_OFF), /* Any off state */
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};
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/* Return non-zero if the chipset is in one of the states specified in the
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* mask. */
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/**
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* Check if chipset is in a given state.
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*
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* @param state_mask Combination of one or more CHIPSET_STATE_* flags.
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*
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* @return non-zero if the chipset is in one of the states specified in the
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* mask.
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*/
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int chipset_in_state(int state_mask);
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/* Ask the chipset to exit the hard off state. Does nothing if the chipset has
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* already left the state, or was not in the state to begin with. */
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/**
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* Ask the chipset to exit the hard off state.
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*
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* Does nothing if the chipset has already left the state, or was not in the
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* state to begin with.
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*/
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void chipset_exit_hard_off(void);
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/* Enable/disable CPU throttling. */
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/**
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* Enable/disable CPU throttling.
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*
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* @param throttle Enable (!=0) or disable(0) throttling
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*/
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void chipset_throttle_cpu(int throttle);
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/**
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* Immedaitely shut off power to main processor and chipset.
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*
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* This is intended for use when the system is too hot or battery power is
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* critical.
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*/
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void chipset_force_shutdown(void);
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/**
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* Reset the CPU and/or chipset.
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*
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* @param cold_reset If !=0, force a cold reset of the CPU and chipset;
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* if 0, just pulse the reset line to the CPU.
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*/
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void chipset_reset(int cold_reset);
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#endif /* __CROS_EC_CHIPSET_H */
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@@ -8,22 +8,11 @@
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#ifndef __CROS_EC_X86_POWER_H
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#define __CROS_EC_X86_POWER_H
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#include "common.h"
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#include "gpio.h"
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/* Interrupt handler for input GPIOs */
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/**
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* Interrupt handler for x86 chipset GPIOs.
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*/
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void x86_power_interrupt(enum gpio_signal signal);
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/* Informs the power module that the CPU has overheated (too_hot=1) or is
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* no longer too hot (too_hot=0). */
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void x86_power_cpu_overheated(int too_hot);
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/* Immediately shuts down power to the main processor and chipset. This is
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* intended for use when the system is too hot or battery power is critical. */
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void x86_power_force_shutdown(void);
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/* Reset the x86. If cold_reset!=0, forces a cold reset by sending
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* power-not-ok; otherwise, just pulses the reset line to the x86. */
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void x86_power_reset(int cold_reset);
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#endif /* __CROS_EC_X86_POWER_H */
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