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rambi: Initial EC firmware

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This should have all the correct GPIO mappings.

Chipset and charger tasks are currently disabled, until we bring up
the voltage rails and I2C communication.

BUG=chrome-os-partner:22895
BRANCH=none
TEST=compiles; everything else needs to wait until we get hardware

Change-Id: Iea49fe7ab8bd17f61c8cc6c71f236a503418ee28
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/170540
Reviewed-by: Vic Yang <victoryang@chromium.org>
This commit is contained in:
ChromeOS Developer
2013-09-19 16:38:34 -07:00
committed by chrome-internal-fetch
parent 9ddc2f3cdc
commit eb27bf14d4
7 changed files with 468 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

212
board/rambi/board.c Normal file
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/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* EC for Rambi board configuration */
#include "adc.h"
#include "backlight.h"
#include "chip_temp_sensor.h"
#include "chipset_haswell.h"
#include "chipset_x86_common.h"
#include "common.h"
#include "ec_commands.h"
#include "extpower.h"
#include "gpio.h"
#include "host_command.h"
#include "i2c.h"
#include "keyboard_scan.h"
#include "lid_switch.h"
#include "lm4_adc.h"
#include "peci.h"
#include "power_button.h"
#include "pwm.h"
#include "pwm_data.h"
#include "registers.h"
#include "switch.h"
#include "temp_sensor.h"
#include "temp_sensor_g781.h"
#include "thermal.h"
#include "timer.h"
#include "util.h"
/* GPIO signal list. Must match order from enum gpio_signal. */
const struct gpio_info gpio_list[] = {
/* Inputs with interrupt handlers are first for efficiency */
{"POWER_BUTTON_L", LM4_GPIO_A, (1<<2), GPIO_INT_BOTH,
power_button_interrupt},
{"LID_OPEN", LM4_GPIO_A, (1<<3), GPIO_INT_BOTH,
lid_interrupt},
{"AC_PRESENT", LM4_GPIO_H, (1<<3), GPIO_INT_BOTH,
extpower_interrupt},
{"PCH_SLP_S3_L", LM4_GPIO_G, (1<<7), GPIO_INT_BOTH|GPIO_PULL_UP,
x86_interrupt},
{"PCH_SLP_S4_L", LM4_GPIO_H, (1<<1), GPIO_INT_BOTH|GPIO_PULL_UP,
x86_interrupt},
{"PP1050_PGOOD", LM4_GPIO_H, (1<<4), GPIO_INT_BOTH,
x86_interrupt},
{"PP3300_PCH_PGOOD", LM4_GPIO_C, (1<<4), GPIO_INT_BOTH,
x86_interrupt},
{"PP5000_PGOOD", LM4_GPIO_N, (1<<0), GPIO_INT_BOTH,
x86_interrupt},
{"S5_PGOOD", LM4_GPIO_G, (1<<0), GPIO_INT_BOTH,
x86_interrupt},
{"VCORE_PGOOD", LM4_GPIO_C, (1<<6), GPIO_INT_BOTH,
x86_interrupt},
{"WP_L", LM4_GPIO_A, (1<<4), GPIO_INT_BOTH|GPIO_PULL_UP,
switch_interrupt},
/* Other inputs */
{"BOARD_VERSION1", LM4_GPIO_Q, (1<<5), GPIO_INPUT, NULL},
{"BOARD_VERSION2", LM4_GPIO_Q, (1<<6), GPIO_INPUT, NULL},
{"BOARD_VERSION3", LM4_GPIO_Q, (1<<7), GPIO_INPUT, NULL},
{"PCH_SLP_SX_L", LM4_GPIO_G, (1<<3), GPIO_INPUT|GPIO_PULL_UP,
NULL},
{"PCH_SUS_STAT_L", LM4_GPIO_G, (1<<6), GPIO_INPUT, NULL},
{"PCH_SUSPWRDNACK", LM4_GPIO_G, (1<<2), GPIO_INPUT|GPIO_PULL_UP,
NULL},
{"PP1000_S0IX_PGOOD", LM4_GPIO_H, (1<<6), GPIO_INPUT, NULL},
{"USB1_OC_L", LM4_GPIO_E, (1<<7), GPIO_INPUT, NULL},
{"USB2_OC_L", LM4_GPIO_E, (1<<0), GPIO_INPUT, NULL},
/* Outputs; all unasserted by default except for reset signals */
{"CPU_PROCHOT", LM4_GPIO_B, (1<<5), GPIO_OUT_LOW, NULL},
{"ENABLE_BACKLIGHT", LM4_GPIO_M, (1<<7), GPIO_ODR_HIGH, NULL},
{"ENABLE_TOUCHPAD", LM4_GPIO_N, (1<<1), GPIO_OUT_LOW, NULL},
{"ENTERING_RW", LM4_GPIO_D, (1<<6), GPIO_OUT_LOW, NULL},
{"LPC_CLKRUN_L", LM4_GPIO_M, (1<<2), GPIO_ODR_HIGH, NULL},
{"PCH_CORE_PWROK", LM4_GPIO_F, (1<<5), GPIO_OUT_LOW, NULL},
{"PCH_PWRBTN_L", LM4_GPIO_H, (1<<0), GPIO_OUT_HIGH, NULL},
{"PCH_RCIN_L", LM4_GPIO_F, (1<<3), GPIO_ODR_LOW, NULL},
{"PCH_RSMRST_L", LM4_GPIO_F, (1<<1), GPIO_OUT_LOW, NULL},
{"PCH_SMI_L", LM4_GPIO_F, (1<<4), GPIO_ODR_HIGH, NULL},
{"PCH_SOC_OVERRIDE_L", LM4_GPIO_G, (1<<1), GPIO_OUT_HIGH, NULL},
{"PCH_SYS_PWROK", LM4_GPIO_H, (1<<2), GPIO_OUT_LOW, NULL},
{"PCH_WAKE_L", LM4_GPIO_F, (1<<0), GPIO_OUT_HIGH, NULL},
{"PP1350_EN", LM4_GPIO_H, (1<<5), GPIO_OUT_LOW, NULL},
{"PP3300_DX_EN", LM4_GPIO_J, (1<<2), GPIO_OUT_LOW, NULL},
{"PP3300_LTE_EN", LM4_GPIO_D, (1<<2), GPIO_OUT_LOW, NULL},
{"PP3300_WLAN_EN", LM4_GPIO_J, (1<<0), GPIO_OUT_LOW, NULL},
{"PP5000_EN", LM4_GPIO_H, (1<<7), GPIO_OUT_LOW, NULL},
{"PPSX_EN", LM4_GPIO_L, (1<<6), GPIO_OUT_LOW, NULL},
{"SUSP_VR_EN", LM4_GPIO_C, (1<<7), GPIO_OUT_LOW, NULL},
{"TOUCHSCREEN_RESET_L", LM4_GPIO_N, (1<<7), GPIO_OUT_LOW, NULL},
{"USB_CTL1", LM4_GPIO_E, (1<<6), GPIO_OUT_LOW, NULL},
{"USB_ILIM_SEL", LM4_GPIO_E, (1<<5), GPIO_OUT_LOW, NULL},
{"USB1_ENABLE", LM4_GPIO_E, (1<<4), GPIO_OUT_LOW, NULL},
{"USB2_ENABLE", LM4_GPIO_D, (1<<5), GPIO_OUT_LOW, NULL},
{"VCORE_EN", LM4_GPIO_C, (1<<5), GPIO_OUT_LOW, NULL},
{"WLAN_OFF_L", LM4_GPIO_J, (1<<4), GPIO_OUT_LOW, NULL},
};
BUILD_ASSERT(ARRAY_SIZE(gpio_list) == GPIO_COUNT);
/* Pins with alternate functions */
const struct gpio_alt_func gpio_alt_funcs[] = {
{GPIO_A, 0x03, 1, MODULE_UART}, /* UART0 */
{GPIO_B, 0x04, 3, MODULE_I2C}, /* I2C0 SCL */
{GPIO_B, 0x08, 3, MODULE_I2C, GPIO_OPEN_DRAIN}, /* I2C0 SDA */
{GPIO_B, 0x40, 3, MODULE_I2C}, /* I2C5 SCL */
{GPIO_B, 0x80, 3, MODULE_I2C, GPIO_OPEN_DRAIN}, /* I2C5 SDA */
{GPIO_D, 0x0f, 2, MODULE_SPI}, /* SPI1 */
{GPIO_L, 0x3f, 15, MODULE_LPC}, /* LPC */
{GPIO_M, 0x33, 15, MODULE_LPC}, /* LPC */
{GPIO_N, 0x50, 1, MODULE_PWM_LED}, /* Power LEDs */
};
const int gpio_alt_funcs_count = ARRAY_SIZE(gpio_alt_funcs);
/* x86 signal list. Must match order of enum x86_signal. */
const struct x86_signal_info x86_signal_list[] = {
{GPIO_PP1050_PGOOD, 1, "PGOOD_PP1050"},
{GPIO_PP3300_PCH_PGOOD, 1, "PGOOD_PP3300_PCH"},
{GPIO_PP5000_PGOOD, 1, "PGOOD_PP5000"},
{GPIO_S5_PGOOD, 1, "PGOOD_S5"},
{GPIO_VCORE_PGOOD, 1, "PGOOD_VCORE"},
{GPIO_PP1000_S0IX_PGOOD, 1, "PGOOD_PP1000_S0IX"},
{GPIO_PCH_SLP_S3_L, 1, "SLP_S3#_DEASSERTED"},
{GPIO_PCH_SLP_S4_L, 1, "SLP_S4#_DEASSERTED"},
{GPIO_PCH_SLP_SX_L, 1, "SLP_SX#_DEASSERTED"},
{GPIO_PCH_SUS_STAT_L, 0, "SUS_STAT#_ASSERTED"},
{GPIO_PCH_SUSPWRDNACK, 1, "SUSPWRDNACK_ASSERTED"},
};
BUILD_ASSERT(ARRAY_SIZE(x86_signal_list) == X86_SIGNAL_COUNT);
/* ADC channels. Must be in the exactly same order as in enum adc_channel. */
const struct adc_t adc_channels[] = {
/* EC internal temperature is calculated by
* 273 + (295 - 450 * ADC_VALUE / ADC_READ_MAX) / 2
* = -225 * ADC_VALUE / ADC_READ_MAX + 420.5
*/
{"ECTemp", LM4_ADC_SEQ0, -225, ADC_READ_MAX, 420,
LM4_AIN_NONE, 0x0e /* TS0 | IE0 | END0 */, 0, 0},
/* IOUT == ICMNT is on PE3/AIN0 */
/* We have 0.01-ohm resistors, and IOUT is 20X the differential
* voltage, so 1000mA ==> 200mV.
* ADC returns 0x000-0xFFF, which maps to 0.0-3.3V (as configured).
* mA = 1000 * ADC_VALUE / ADC_READ_MAX * 3300 / 200
*/
{"ChargerCurrent", LM4_ADC_SEQ1, 33000, ADC_READ_MAX * 2, 0,
LM4_AIN(0), 0x06 /* IE0 | END0 */, LM4_GPIO_E, (1<<3)},
};
BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
/* PWM channels */
const struct pwm_t pwm_channels[] = {
[PWM_CH_LED_GREEN] = {FAN_CH_LED_GREEN, 0},
[PWM_CH_LED_RED] = {FAN_CH_LED_RED, 0},
};
BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
/* I2C ports */
const struct i2c_port_t i2c_ports[] = {
/* Note: battery and charger share a port. Only include it once in
* this list so we don't double-initialize it. */
{"batt_chg", I2C_PORT_BATTERY, 100},
{"thermal", I2C_PORT_THERMAL, 100},
};
BUILD_ASSERT(ARRAY_SIZE(i2c_ports) == I2C_PORTS_USED);
/* Temperature sensors data; must be in same order as enum temp_sensor_id. */
const struct temp_sensor_t temp_sensors[] = {
{"ECInternal", TEMP_SENSOR_TYPE_BOARD, chip_temp_sensor_get_val, 0, 4},
{"G781Internal", TEMP_SENSOR_TYPE_BOARD, g781_get_val,
G781_IDX_INTERNAL, 4},
{"G781External", TEMP_SENSOR_TYPE_BOARD, g781_get_val,
G781_IDX_EXTERNAL, 4},
};
BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
/* Thermal limits for each temp sensor. All temps are in degrees K. Must be in
* same order as enum temp_sensor_id. To always ignore any temp, use 0.
*/
struct ec_thermal_config thermal_params[] = {
{{0, 0, 0}, 0, 0},
{{0, 0, 0}, 0, 0},
{{0, 0, 0}, 0, 0},
};
BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT);
/**
* Perform necessary actions on host wake events.
*/
void board_process_wake_events(uint32_t active_wake_events)
{
uint32_t power_button_mask;
power_button_mask = EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON);
/* If there are other events aside from the power button press drive
* the wake pin. Otherwise ensure it is high. */
if (active_wake_events & ~power_button_mask)
gpio_set_level(GPIO_PCH_WAKE_L, 0);
else
gpio_set_level(GPIO_PCH_WAKE_L, 1);
}
/**
* Board-specific g781 power state.
*/
int board_g781_has_power(void)
{
return gpio_get_level(GPIO_PP3300_DX_EN);
}

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board/rambi/board.h Normal file
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/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* Configuration for Rambi mainboard */
#ifndef __BOARD_H
#define __BOARD_H
/* Optional features */
#define CONFIG_BOARD_VERSION
#define CONFIG_CMD_GSV
#define CONFIG_EXTPOWER_GPIO
#define CONFIG_KEYBOARD_PROTOCOL_8042
#undef CONFIG_PECI
#define CONFIG_POWER_BUTTON
#define CONFIG_POWER_BUTTON_X86
#define CONFIG_PWM
#define CONFIG_TEMP_SENSOR
#define CONFIG_TEMP_SENSOR_G781
#define CONFIG_WIRELESS
/* TODO(rspangler): port these to Rambi, or remove if not needed */
#if 0
#define CONFIG_BACKLIGHT_X86
#define CONFIG_BATTERY_CHECK_CONNECTED
#define CONFIG_BATTERY_SMART
#define CONFIG_CHARGER
#define CONFIG_CHARGER_BQ24707A
#define CONFIG_CHARGER_DISCHARGE_ON_AC
#define CONFIG_CHARGER_INPUT_CURRENT 4032 /* mA, about half max */
#define CONFIG_CHARGER_SENSE_RESISTOR 10 /* Charge sense resistor, mOhm */
#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 /* Input sensor resistor, mOhm */
#define CONFIG_CHIPSET_CAN_THROTTLE
#define CONFIG_CHIPSET_HASWELL
#define CONFIG_CHIPSET_X86
#define CONFIG_LED_SLIPPY
#define CONFIG_USB_PORT_POWER_DUMB
#endif
#ifndef __ASSEMBLER__
/* Module IDs */
/* TODO(rspangler): use this in place of enum console_channel as well */
enum module_id {
MODULE_I2C,
MODULE_LPC,
MODULE_SPI,
MODULE_PWM_LED,
MODULE_UART,
};
/* PWM channels */
#define FAN_CH_LED_GREEN 4 /* LED0 = green */
#define FAN_CH_LED_RED 3 /* LED1 = red */
/* I2C ports */
#define I2C_PORT_BATTERY 0
#define I2C_PORT_CHARGER 0
#define I2C_PORT_THERMAL 5
/* There are only two I2C ports used because battery and charger share a port */
#define I2C_PORTS_USED 2
/* 13x8 keyboard scanner uses an entire GPIO bank for row inputs */
#define KB_SCAN_ROW_IRQ LM4_IRQ_GPIOK
#define KB_SCAN_ROW_GPIO LM4_GPIO_K
/* Host connects to keyboard controller module via LPC */
#define HOST_KB_BUS_LPC
/* USB ports */
#define USB_PORT_COUNT 2
/* Wireless signals */
#define WIRELESS_GPIO_WLAN GPIO_WLAN_OFF_L
#define WIRELESS_GPIO_WWAN GPIO_PP3300_LTE_EN
#define WIRELESS_GPIO_WLAN_POWER GPIO_PP3300_WLAN_EN
/* GPIO signal definitions. */
enum gpio_signal {
/* Inputs with interrupt handlers are first for efficiency */
GPIO_POWER_BUTTON_L = 0, /* Power button */
GPIO_LID_OPEN, /* Lid switch */
GPIO_AC_PRESENT, /* AC power present */
GPIO_PCH_SLP_S3_L, /* SLP_S3# signal from PCH */
GPIO_PCH_SLP_S4_L, /* SLP_S4# signal from PCH */
GPIO_PP1050_PGOOD, /* Power good on 1.05V */
GPIO_PP3300_PCH_PGOOD, /* Power good on 3.3V (PCH supply) */
GPIO_PP5000_PGOOD, /* Power good on 5V */
GPIO_S5_PGOOD, /* Power good on S5 supplies */
GPIO_VCORE_PGOOD, /* Power good on core VR */
GPIO_WP_L, /* Write protect input */
/* Other inputs */
GPIO_BOARD_VERSION1, /* Board version stuffing resistor 1 */
GPIO_BOARD_VERSION2, /* Board version stuffing resistor 2 */
GPIO_BOARD_VERSION3, /* Board version stuffing resistor 3 */
GPIO_PCH_SLP_SX_L, /* SLP_S0IX# signal from PCH */
GPIO_PCH_SUS_STAT_L, /* SUS_STAT# signal from PCH */
GPIO_PCH_SUSPWRDNACK, /* SUSPWRDNACK signal from PCH */
GPIO_PP1000_S0IX_PGOOD, /* Power good on 1.00V (S0iX supplies) */
GPIO_USB1_OC_L, /* USB port overcurrent warning */
GPIO_USB2_OC_L, /* USB port overcurrent warning */
/* Outputs */
GPIO_CPU_PROCHOT, /* Force CPU to think it's overheated */
GPIO_ENABLE_BACKLIGHT, /* Enable backlight power */
GPIO_ENABLE_TOUCHPAD, /* Enable touchpad power */
GPIO_ENTERING_RW, /* Indicate when EC is entering RW code */
GPIO_LPC_CLKRUN_L, /* Request that PCH drive LPC clock */
GPIO_PCH_CORE_PWROK, /* Indicate core well power is stable */
GPIO_PCH_PWRBTN_L, /* Power button output to PCH */
GPIO_PCH_RCIN_L, /* RCIN# line to PCH (for 8042 emulation) */
GPIO_PCH_RSMRST_L, /* Reset PCH resume power plane logic */
GPIO_PCH_SMI_L, /* System management interrupt to PCH */
GPIO_PCH_SOC_OVERRIDE_L, /* SOC override signal to PCH; when high, ME
* ignores security descriptor */
GPIO_PCH_SYS_PWROK, /* EC thinks everything is up and ready */
GPIO_PCH_WAKE_L, /* Wake signal from EC to PCH */
GPIO_PP1350_EN, /* Enable 1.35V supply */
GPIO_PP3300_DX_EN, /* Enable power to lots of peripherals */
GPIO_PP3300_LTE_EN, /* Enable LTE radio */
GPIO_PP3300_WLAN_EN, /* Enable WiFi power */
GPIO_PP5000_EN, /* Enable 5V supply */
GPIO_PPSX_EN, /* Enable PP1350_PCH_SX, PP1000_PCH_SX */
GPIO_SUSP_VR_EN, /* Enable 1.05V regulator */
GPIO_TOUCHSCREEN_RESET_L, /* Reset touch screen */
GPIO_USB_CTL1, /* USB control signal 1 to both ports */
GPIO_USB_ILIM_SEL, /* USB current limit to both ports */
GPIO_USB1_ENABLE, /* USB port 1 output power enable */
GPIO_USB2_ENABLE, /* USB port 2 output power enable */
GPIO_VCORE_EN, /* Enable core power supplies */
GPIO_WLAN_OFF_L, /* Disable WiFi radio */
/* Number of GPIOs; not an actual GPIO */
GPIO_COUNT
};
/* x86 signal definitions */
enum x86_signal {
X86_PGOOD_PP1050 = 0,
X86_PGOOD_PP3300_PCH,
X86_PGOOD_PP5000,
X86_PGOOD_S5,
X86_PGOOD_VCORE,
X86_PGOOD_PP1000_S0IX,
X86_PCH_SLP_S3n_DEASSERTED,
X86_PCH_SLP_S4n_DEASSERTED,
X86_PCH_SLP_SXn_DEASSERTED,
X86_PCH_SUS_STATn,
X86_PCH_SUSPWRDNACK,
/* Number of X86 signals */
X86_SIGNAL_COUNT
};
enum adc_channel {
/* EC internal die temperature in degrees K. */
ADC_CH_EC_TEMP = 0,
/* Charger current in mA. */
ADC_CH_CHARGER_CURRENT,
ADC_CH_COUNT
};
enum pwm_channel {
PWM_CH_LED_GREEN,
PWM_CH_LED_RED,
/* Number of PWM channels */
PWM_CH_COUNT
};
enum temp_sensor_id {
/* EC internal temperature sensor */
TEMP_SENSOR_EC_INTERNAL = 0,
/* G781 internal and external sensors */
TEMP_SENSOR_I2C_G781_INTERNAL,
TEMP_SENSOR_I2C_G781_EXTERNAL,
TEMP_SENSOR_COUNT
};
/**
* Board-specific g781 power state.
*/
int board_g781_has_power(void);
#endif /* !__ASSEMBLER__ */
#endif /* __BOARD_H */

12
board/rambi/build.mk Normal file
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@@ -0,0 +1,12 @@
# -*- makefile -*-
# Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
#
# Board specific files build
#
# the IC is TI Stellaris LM4
CHIP:=lm4
board-y=board.o

30
board/rambi/ec.tasklist Normal file
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@@ -0,0 +1,30 @@
/* -*- c -*- */
/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/**
* List of enabled tasks in the priority order
*
* The first one has the lowest priority.
*
* For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
* TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
* where :
* 'n' is the name of the task
* 'r' is the main routine of the task
* 'd' is an opaque parameter passed to the routine at startup
* 's' is the stack size in bytes; must be a multiple of 8
*/
/* TODO(rspangler): re-enable tasks once initial bringup is done */
#define CONFIG_TASK_LIST \
TASK_ALWAYS(HOOKS, hook_task, NULL, TASK_STACK_SIZE) \
TASK_NOTEST(VBOOTHASH, vboot_hash_task, NULL, LARGER_TASK_STACK_SIZE) \
/* TASK_ALWAYS(CHARGER, charger_task, NULL, TASK_STACK_SIZE) */ \
/* TASK_NOTEST(CHIPSET, chipset_task, NULL, TASK_STACK_SIZE) */ \
TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_ALWAYS(POWERBTN, power_button_task, NULL, TASK_STACK_SIZE) \
TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE)

12
chip/lm4/openocd/lm4x_cmds.tcl
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@@ -35,6 +35,10 @@ proc flash_slippy { } {
flash_lm4 ../../../build/slippy/ec.bin 0
}
proc flash_rambi { } {
flash_lm4 ../../../build/rambi/ec.bin 0
}
# Bolt/slippy/falco/peppy have 128KB images
proc flash_bolt { } {
flash_lm4 ../../../build/bolt/ec.bin 0
@@ -60,6 +64,14 @@ proc flash_peppy { } {
flash_lm4 ../../../build/peppy/ec.bin 0
}
proc flash_rambi_ro { } {
flash_lm4 ../../../build/rambi/ec.RO.flat 0
}
proc flash_rambi_rw { } {
flash_lm4 ../../../build/rambi/ec.RW.bin 131072
}
# link has pstate in last sector
proc unprotect_link { } {
reset halt

4
include/backlight.h
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@@ -15,6 +15,10 @@
*
* @param signal Signal which triggered the interrupt.
*/
#ifdef CONFIG_BACKLIGHT_X86
void backlight_interrupt(enum gpio_signal signal);
#else
#define backlight_interrupt NULL
#endif
#endif /* __CROS_EC_BACKLIGHT_H */

8
util/flash_ec
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@@ -144,7 +144,7 @@ function free_pty() {
# Board specific flashing scripts
function flash_daisy() {
function flash_stm32() {
TOOL_PATH="${SCRIPT_LOCATION}/../build/${BOARD}/util:$PATH"
STM32MON=$(PATH="${TOOL_PATH}" which stm32mon)
if [ ! -x "$STM32MON" ]; then
@@ -190,7 +190,7 @@ function flash_link() {
die "Failed to program ${IMG}"
}
function flash_slippy() {
function flash_lm4() {
OCD_CFG="servo_v2_slower.cfg"
OCD_PATH="${SRC_ROOT}/platform/ec/chip/lm4/openocd"
OCD_CMDS="init; flash_lm4 ${IMG} ${FLAGS_offset};"
@@ -222,9 +222,9 @@ fi
save="$(servo_save)"
case "${BOARD}" in
puppy | daisy | snow | spring | pit | kirby ) flash_daisy ;;
daisy | kirby | pit | puppy | snow | spring ) flash_stm32 ;;
bolt | falco | peppy | rambi | slippy ) flash_lm4 ;;
link ) flash_link ;;
slippy | falco | peppy | bolt ) flash_slippy ;;
*) die "board ${BOARD} not supported" ;;
esac