mirror of
https://github.com/Telecominfraproject/OpenCellular.git
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Updates user guide following out of box testing.
Change-Id: I0cd355d9fc7f14fb4eabb443d596d6f0858f609e Signed-off-by: Eleanor Bonnici <Eleanor.bonnici@arm.com>
This commit is contained in:
@@ -15,10 +15,9 @@ is outside the scope of this document.
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This document assumes that the reader has previous experience running a fully
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bootable Linux software stack on Juno or FVP using the prebuilt binaries and
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filesystems provided by `Linaro`_. Further information may
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be found in the `Instructions for using the Linaro software deliverables`_. It
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also assumes that the user understands the role of the different software
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components required to boot a Linux system:
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filesystems provided by `Linaro`_. Further information may be found in the
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`Linaro instructions`_. It also assumes that the user understands the role of
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the different software components required to boot a Linux system:
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- Specific firmware images required by the platform (e.g. SCP firmware on Juno)
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- Normal world bootloader (e.g. UEFI or U-Boot)
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@@ -26,7 +25,7 @@ components required to boot a Linux system:
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- Linux kernel image
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- Root filesystem
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This document also assumes that the user is familiar with the FVP models and
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This document also assumes that the user is familiar with the `FVP models`_ and
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the different command line options available to launch the model.
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This document should be used in conjunction with the `Firmware Design`_.
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@@ -59,9 +58,10 @@ command:
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ARM TF has been tested with `Linaro Release 17.04`_.
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Download and install the AArch32 or AArch64 little-endian GCC cross compiler.
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The `Linaro Release Notes`_ documents which version of the
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compiler to use for a given Linaro Release. Also, these
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`Linaro instructions`_ provide further guidance.
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The `Linaro Release Notes`_ documents which version of the compiler to use for a
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given Linaro Release. Also, these `Linaro instructions`_ provide further
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guidance and a script, which can be used to download Linaro deliverables
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automatically.
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Optionally, Trusted Firmware can be built using clang or ARM Compiler 6.
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See instructions below on how to switch the default compiler.
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@@ -439,7 +439,8 @@ Common build options
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- ``PLAT``: Choose a platform to build ARM Trusted Firmware for. The chosen
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platform name must be subdirectory of any depth under ``plat/``, and must
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contain a platform makefile named ``platform.mk``.
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contain a platform makefile named ``platform.mk``. For example to build ARM
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Trusted Firmware for ARM Juno board select PLAT=juno.
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- ``PRELOADED_BL33_BASE``: This option enables booting a preloaded BL33 image
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instead of the normal boot flow. When defined, it must specify the entry
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@@ -1045,8 +1046,7 @@ Building a FIP for Juno and FVP
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This section provides Juno and FVP specific instructions to build Trusted
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Firmware, obtain the additional required firmware, and pack it all together in
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a single FIP binary. It assumes that a `Linaro Release`_
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has been installed.
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a single FIP binary. It assumes that a `Linaro Release`_ has been installed.
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Note: Pre-built binaries for AArch32 are available from Linaro Release 16.12
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onwards. Before that release, pre-built binaries are only available for AArch64.
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@@ -1076,8 +1076,8 @@ corrupted binaries.
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<path/to/linaro/release>/fip.bin
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The unpack operation will result in a set of binary images extracted to the
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working directory. The SCP\_BL2 image corresponds to ``scp-fw.bin`` and BL33
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corresponds to ``nt-fw.bin``.
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current working directory. The SCP\_BL2 image corresponds to
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``scp-fw.bin`` and BL33 corresponds to ``nt-fw.bin``.
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Note: the fiptool will complain if the images to be unpacked already
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exist in the current directory. If that is the case, either delete those
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@@ -1367,6 +1367,12 @@ on the following ARM FVPs (64-bit host machine only).
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NOTE: The build numbers quoted above are those reported by launching the FVP
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with the ``--version`` parameter.
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NOTE: Linaro provides a ramdisk image in prebuilt FVP configurations and full
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file systems that can be downloaded separately. To run an FVP with a virtio
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file system image an additional FVP configuration option
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``-C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>`` can be
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used.
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NOTE: The software will not work on Version 1.0 of the Foundation FVP.
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The commands below would report an ``unhandled argument`` error in this case.
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@@ -1440,9 +1446,9 @@ The following ``Foundation_Platform`` parameters should be used to boot Linux wi
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--gicv3 \
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--data="<path-to>/<bl1-binary>"@0x0 \
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--data="<path-to>/<FIP-binary>"@0x08000000 \
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--data="<path-to>/<fdt>"@0x83000000 \
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--data="<path-to>/<fdt>"@0x82000000 \
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--data="<path-to>/<kernel-binary>"@0x80080000 \
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--block-device="<path-to>/<file-system-image>"
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--data="<path-to>/<ramdisk-binary>"@0x84000000
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Notes:
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@@ -1471,9 +1477,9 @@ with 8 CPUs using the AArch64 build of ARM Trusted Firmware.
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-C cache_state_modelled=1 \
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-C bp.secureflashloader.fname="<path-to>/<bl1-binary>" \
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-C bp.flashloader0.fname="<path-to>/<FIP-binary>" \
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--data cluster0.cpu0="<path-to>/<fdt>"@0x83000000 \
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--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
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--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
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-C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>"
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--data cluster0.cpu0="<path-to>/<ramdisk>"@0x84000000
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Running on the AEMv8 Base FVP (AArch32) with reset to BL1 entrypoint
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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@@ -1500,9 +1506,9 @@ with 8 CPUs using the AArch32 build of ARM Trusted Firmware.
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-C cluster1.cpu3.CONFIG64=0 \
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-C bp.secureflashloader.fname="<path-to>/<bl1-binary>" \
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-C bp.flashloader0.fname="<path-to>/<FIP-binary>" \
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--data cluster0.cpu0="<path-to>/<fdt>"@0x83000000 \
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--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
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--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
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-C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>"
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--data cluster0.cpu0="<path-to>/<ramdisk>"@0x84000000
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Running on the Cortex-A57-A53 Base FVP with reset to BL1 entrypoint
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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@@ -1519,9 +1525,9 @@ boot Linux with 8 CPUs using the AArch64 build of ARM Trusted Firmware.
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-C cache_state_modelled=1 \
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-C bp.secureflashloader.fname="<path-to>/<bl1-binary>" \
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-C bp.flashloader0.fname="<path-to>/<FIP-binary>" \
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--data cluster0.cpu0="<path-to>/<fdt>"@0x83000000 \
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--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
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--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
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-C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>"
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--data cluster0.cpu0="<path-to>/<ramdisk>"@0x84000000
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Running on the Cortex-A32 Base FVP (AArch32) with reset to BL1 entrypoint
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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@@ -1538,9 +1544,9 @@ boot Linux with 4 CPUs using the AArch32 build of ARM Trusted Firmware.
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-C cache_state_modelled=1 \
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-C bp.secureflashloader.fname="<path-to>/<bl1-binary>" \
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-C bp.flashloader0.fname="<path-to>/<FIP-binary>" \
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--data cluster0.cpu0="<path-to>/<fdt>"@0x83000000 \
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--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
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--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
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-C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>"
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--data cluster0.cpu0="<path-to>/<ramdisk>"@0x84000000
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Running on the AEMv8 Base FVP with reset to BL31 entrypoint
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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@@ -1568,9 +1574,9 @@ with 8 CPUs using the AArch64 build of ARM Trusted Firmware.
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--data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04023000 \
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--data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04001000 \
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--data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \
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--data cluster0.cpu0="<path-to>/<fdt>"@0x83000000 \
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--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
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--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
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-C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>"
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--data cluster0.cpu0="<path-to>/<ramdisk>"@0x84000000
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Notes:
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@@ -1622,9 +1628,9 @@ with 8 CPUs using the AArch32 build of ARM Trusted Firmware.
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-C cluster1.cpu3.RVBAR=0x04001000 \
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--data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04001000 \
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--data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \
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--data cluster0.cpu0="<path-to>/<fdt>"@0x83000000 \
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--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
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--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
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-C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>"
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--data cluster0.cpu0="<path-to>/<ramdisk>"@0x84000000
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Note: The load address of ``<bl32-binary>`` depends on the value ``BL32_BASE``.
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It should match the address programmed into the RVBAR register as well.
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@@ -1653,9 +1659,9 @@ boot Linux with 8 CPUs using the AArch64 build of ARM Trusted Firmware.
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--data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04023000 \
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--data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04001000 \
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--data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \
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--data cluster0.cpu0="<path-to>/<fdt>"@0x83000000 \
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--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
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--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
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-C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>"
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--data cluster0.cpu0="<path-to>/<ramdisk>"@0x84000000
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Running on the Cortex-A32 Base FVP (AArch32) with reset to SP\_MIN entrypoint
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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@@ -1676,9 +1682,9 @@ boot Linux with 4 CPUs using the AArch32 build of ARM Trusted Firmware.
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-C cluster0.cpu3.RVBARADDR=0x04001000 \
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--data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04001000 \
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--data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \
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--data cluster0.cpu0="<path-to>/<fdt>"@0x83000000 \
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--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
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--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
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-C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>"
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--data cluster0.cpu0="<path-to>/<ramdisk>"@0x84000000
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Running the software on Juno
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----------------------------
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@@ -1726,21 +1732,21 @@ wakeup interrupt from RTC.
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*Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.*
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.. _Linaro: `Linaro Release Notes`_
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.. _Instructions for using the Linaro software deliverables: https://community.arm.com/dev-platforms/b/documents/posts/instructions-for-using-the-linaro-software-deliverables
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.. _Firmware Design: firmware-design.rst
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.. _Linaro Release: `Linaro Release Notes`_
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.. _Linaro Release Notes: https://community.arm.com/tools/dev-platforms/b/documents/posts/linaro-release-notes-deprecated
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.. _Linaro Release 17.04: https://community.arm.com/tools/dev-platforms/b/documents/posts/linaro-release-notes-deprecated#LinaroRelease17.04
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.. _Linaro instructions: https://community.arm.com/dev-platforms/b/documents/posts/instructions-for-using-the-linaro-software-deliverables
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.. _Instructions for using Linaro's deliverables on Juno: https://community.arm.com/dev-platforms/b/documents/posts/using-linaros-deliverables-on-juno
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.. _ARM Platforms Portal: https://community.arm.com/dev-platforms/
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.. _Development Studio 5 (DS-5): http://www.arm.com/products/tools/software-tools/ds-5/index.php
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.. _here: ./psci-lib-integration-guide.rst
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.. _here: psci-lib-integration-guide.rst
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.. _Trusted Board Boot: trusted-board-boot.rst
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.. _Secure-EL1 Payloads and Dispatchers: firmware-design.rst#user-content-secure-el1-payloads-and-dispatchers
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.. _Firmware Update: ./firmware-update.rst
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.. _Firmware Update: firmware-update.rst
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.. _Firmware Design: firmware-design.rst
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.. _mbed TLS Repository: https://github.com/ARMmbed/mbedtls.git
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.. _mbed TLS Security Center: https://tls.mbed.org/security
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.. _Linaro Release: https://community.arm.com/tools/dev-platforms/b/documents/posts/linaro-release-notes-deprecated
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.. _ARM's website: `FVP models`_
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.. _FVP models: https://developer.arm.com/products/system-design/fixed-virtual-platforms
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.. _Juno Getting Started Guide: http://infocenter.arm.com/help/topic/com.arm.doc.dui0928e/DUI0928E_juno_arm_development_platform_gsg.pdf
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.. _ARM's website: https://developer.arm.com/products/system-design/fixed-virtual-platforms
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.. _Instructions for using Linaro's deliverables on Juno: https://community.arm.com/dev-platforms/b/documents/posts/using-linaros-deliverables-on-juno
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.. _ARM Platforms Portal: https://community.arm.com/groups/arm-development-platforms
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.. _PSCI: http://infocenter.arm.com/help/topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf
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