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meowth: zoombini: Add overcurrent notification.

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This commit enables the interrupt handlers for the SN5S330 for both
meowth and zoombini.  Additionally, on meowth the interrupt line is
shared between the TCPC and the PPC, therefore we have to check both
parts when an interrupt occurs.  The TCPC will be serviced first,
however when reporting the alert status, we need to actually read the
alert registers since we cannot simply use the level of the interrupt
line as the PPC may be asserting an interrupt as well.

The PPC is currently setup to interrupt on PP1 overcurrent situations.
The EC will then notify the AP of the overcurrent status by simply
setting the overcurrent GPIOs.

BUG=b:69139844
BRANCH=None
TEST=Flash meowth;  Verify EC boots up okay.
TEST=Flash zoombini; Verify EC boots up okay.  Verify can still perform
PD negotiation.

CQ-DEPEND=CL:797936

Change-Id: I43445799088711de9d5ed488abc945e6f1084918
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/797937
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This commit is contained in:
Aseda Aboagye
2017-11-28 14:37:21 -08:00
committed by chrome-bot
parent 02e4c2ea9a
commit ec917e64b2
2 changed files with 108 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

98
board/zoombini/board.c
View File

@@ -50,6 +50,43 @@ static void tcpc_alert_event(enum gpio_signal s)
#endif
}
#ifdef BOARD_MEOWTH
/*
* Meowth shares the TCPC Alert# line with the TI SN5S330's interrupt line.
* Therefore, we need to also check on that part.
*/
static void usb_c_interrupt(enum gpio_signal s)
{
int port = (s == GPIO_USB_C0_PD_INT_L) ? 0 : 1;
tcpc_alert_event(s);
sn5s330_interrupt(port);
}
#endif /* defined(BOARD_MEOWTH) */
#ifdef BOARD_ZOOMBINI
static void ppc_interrupt(enum gpio_signal s)
{
switch (s) {
case GPIO_USB_C0_PPC_INT_L:
sn5s330_interrupt(0);
break;
case GPIO_USB_C1_PPC_INT_L:
sn5s330_interrupt(1);
break;
case GPIO_USB_C2_PPC_INT_L:
sn5s330_interrupt(2);
break;
default:
break;
};
}
#endif /* defined(BOARD_ZOOMBINI) */
#include "gpio_list.h"
const enum gpio_signal hibernate_wake_pins[] = {
@@ -253,6 +290,13 @@ static void board_init(void)
int i;
#endif /* defined(BOARD_ZOOMBINI) */
#ifdef BOARD_ZOOMBINI
/* Enable PPC interrupts. */
gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_L);
gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_L);
gpio_enable_interrupt(GPIO_USB_C2_PPC_INT_L);
#endif /* defined(BOARD_ZOOMBINI) */
/* Enable TCPC interrupts. */
gpio_enable_interrupt(GPIO_USB_C0_PD_INT_L);
gpio_enable_interrupt(GPIO_USB_C1_PD_INT_L);
@@ -274,6 +318,36 @@ static void board_init(void)
}
DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
void board_overcurrent_event(int port)
{
/* Sanity check the port. */
if ((port < 0) || (port >= CONFIG_USB_PD_PORT_COUNT))
return;
/* Note that the levels are inverted because the pin is active low. */
switch (port) {
case 0:
gpio_set_level(GPIO_USB_C0_OC_L, 0);
break;
case 1:
gpio_set_level(GPIO_USB_C1_OC_L, 0);
break;
#ifdef BOARD_ZOOMBINI
case 2:
gpio_set_level(GPIO_USB_C2_OC_L, 0);
break;
#endif /* defined(BOARD_ZOOMBINI) */
default:
return;
};
/* TODO(aaboagye): Write a PD log entry for the OC event. */
CPRINTS("C%d: overcurrent!", port);
}
static void board_pmic_init(void)
{
/* No need to re-initialize the PMIC on sysjumps. */
@@ -382,12 +456,34 @@ void board_set_charge_limit(int port, int supplier, int charge_ma,
uint16_t tcpc_get_alert_status(void)
{
uint16_t status = 0;
#ifdef BOARD_MEOWTH
int regval;
/*
* For Meowth, the interrupt line is shared between the TCPC and PPC.
* Therefore, go out and actually read the alert registers to report the
* alert status.
*/
if (!tcpc_read16(0, TCPC_REG_ALERT, &regval)) {
/* The TCPCI spec says to ignore bits 14:12. */
regval &= ~((1 << 14) | (1 << 13) | (1 << 12));
if (regval)
status |= PD_STATUS_TCPC_ALERT_0;
}
if (!tcpc_read16(1, TCPC_REG_ALERT, &regval)) {
/* TCPCI spec says to ignore bits 14:12. */
regval &= ~((1 << 14) | (1 << 13) | (1 << 12));
if (regval)
status |= PD_STATUS_TCPC_ALERT_1;
}
#else
if (!gpio_get_level(GPIO_USB_C0_PD_INT_L))
status |= PD_STATUS_TCPC_ALERT_0;
if (!gpio_get_level(GPIO_USB_C1_PD_INT_L))
status |= PD_STATUS_TCPC_ALERT_1;
#ifdef BOARD_ZOOMBINI
if (!gpio_get_level(GPIO_USB_C2_PD_INT_L))
status |= PD_STATUS_TCPC_ALERT_2;
#endif /* defined(BOARD_ZOOMBINI) */

13
board/zoombini/gpio.inc
View File

@@ -14,6 +14,10 @@ GPIO_INT(USB_C0_PD_INT_L, PIN(6, 1), GPIO_INT_FALLING, tcpc_alert_event)
GPIO_INT(USB_C1_PD_INT_L, PIN(F, 5), GPIO_INT_FALLING, tcpc_alert_event)
GPIO_INT(USB_C2_PD_INT_L, PIN(9, 5), GPIO_INT_FALLING, tcpc_alert_event)
GPIO_INT(USB_C0_PPC_INT_L, PIN(0, 3), GPIO_INT_FALLING, ppc_interrupt)
GPIO_INT(USB_C1_PPC_INT_L, PIN(0, 4), GPIO_INT_FALLING, ppc_interrupt)
GPIO_INT(USB_C2_PPC_INT_L, PIN(4, 0), GPIO_INT_FALLING, ppc_interrupt)
GPIO_INT(POWER_BUTTON_L, PIN(0, 1), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt)
GPIO_INT(WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt)
GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt)
@@ -80,6 +84,9 @@ GPIO(USB_C2_BC12_VBUS_ON_L, PIN(E, 0), GPIO_ODR_HIGH)
GPIO(USB_C0_BC12_CHG_DET, PIN(6, 2), GPIO_INPUT)
GPIO(USB_C1_BC12_CHG_DET, PIN(8, 3), GPIO_INPUT)
GPIO(USB_C2_BC12_CHG_DET, PIN(E, 4), GPIO_INPUT)
GPIO(USB_C0_OC_L, PIN(6, 7), GPIO_ODR_HIGH)
GPIO(USB_C1_OC_L, PIN(7, 0), GPIO_ODR_HIGH)
GPIO(USB_C2_OC_L, PIN(6, 3), GPIO_ODR_HIGH)
GPIO(BOARD_VERSION1, PIN(9, 6), GPIO_INPUT)
GPIO(BOARD_VERSION2, PIN(9, 3), GPIO_INPUT)
@@ -125,8 +132,8 @@ ALTERNATE(PIN_MASK(D, 0x04), 1, MODULE_PMU, 0) /* GPIOD2 */
/* Meowth GPIOs */
#else
GPIO_INT(USB_C0_PD_INT_L, PIN(6, 1), GPIO_INT_FALLING, tcpc_alert_event)
GPIO_INT(USB_C1_PD_INT_L, PIN(F, 5), GPIO_INT_FALLING, tcpc_alert_event)
GPIO_INT(USB_C0_PD_INT_L, PIN(6, 1), GPIO_INT_FALLING, usb_c_interrupt)
GPIO_INT(USB_C1_PD_INT_L, PIN(F, 5), GPIO_INT_FALLING, usb_c_interrupt)
GPIO_INT(POWER_BUTTON_L, PIN(0, 1), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt)
GPIO_INT(WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt)
@@ -154,6 +161,8 @@ GPIO(EN_PP3300_WLAN, PIN(8, 3), GPIO_INPUT)
GPIO(ENTERING_RW, PIN(E, 1), GPIO_OUT_LOW)
GPIO(CCD_MODE_ODL, PIN(E, 3), GPIO_INPUT) /* Case Closed Debug mode. */
GPIO(PMIC_EN, PIN(8, 6), GPIO_ODR_LOW)
GPIO(USB_C0_OC_L, PIN(6, 7), GPIO_ODR_HIGH)
GPIO(USB_C1_OC_L, PIN(7, 0), GPIO_ODR_HIGH)
GPIO(ENABLE_BACKLIGHT, PIN(D, 3), GPIO_ODR_LOW) /* EC_BL_EN_OD */
GPIO(PCH_DSW_PWROK, PIN(3, 7), GPIO_OUT_LOW) /* EC_PCH_DSW_PWROK */