meowth_fp: update pins configuration

Disable the system lock (ie ignore Write-protect) until we have fully
defined our secure update scheme.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=b:73337313
TEST=On Meowth, run 'ectool --name=cros_fp gpioget WP'

Change-Id: I3323f5d1e48debae9e2ca6e18f4439e2849a3683
Reviewed-on: https://chromium-review.googlesource.com/924125
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
This commit is contained in:
Vincent Palatin
2018-02-14 15:22:14 +01:00
committed by chrome-bot
parent 59c68a1d4b
commit f29bf0fbbd
2 changed files with 15 additions and 2 deletions

View File

@@ -8,6 +8,12 @@
#ifndef __BOARD_H
#define __BOARD_H
/*
* TODO(b/73337313) remove this config,
* once the write-protection scheme is decided and validated.
*/
#define CONFIG_SYSTEM_UNLOCKED
/* the UART console is on USART1 */
#undef CONFIG_UART_CONSOLE
#define CONFIG_UART_CONSOLE 1
@@ -31,7 +37,7 @@
#define CONFIG_STM_HWTIMER32
#undef CONFIG_TASK_PROFILING
#define CONFIG_WATCHDOG_HELP
#define CONFIG_WP_ALWAYS
#define CONFIG_WP_ACTIVE_HIGH
/* SPI configuration for the fingerprint sensor */
#define CONFIG_SPI_MASTER

View File

@@ -8,13 +8,20 @@
GPIO_INT(FPS_INT, PIN(A, 0), GPIO_INT_RISING, fps_event)
GPIO_INT(SPI1_NSS, PIN(A, 4), GPIO_INPUT, spi_event)
GPIO(PCH_SLP_S0_L, PIN(D,13), GPIO_INPUT)
GPIO(PCH_SLP_S3_L, PIN(A,11), GPIO_INPUT)
GPIO(PCH_SLP_S4_L, PIN(D, 8), GPIO_INPUT)
GPIO(PCH_SLP_SUS_L, PIN(D, 3), GPIO_INPUT)
GPIO(WP, PIN(B, 7), GPIO_INPUT)
/* Outputs */
GPIO(EC_INT_L, PIN(A, 1), GPIO_INPUT) /* Enabled when PCH is up */
GPIO(FP_RST_ODL, PIN(E, 0), GPIO_ODR_HIGH)
GPIO(SPI4_NSS, PIN(E, 4), GPIO_OUT_HIGH)
GPIO(USER_PRES_L, PIN(C, 5), GPIO_ODR_HIGH)
UNIMPLEMENTED(ENTERING_RW)
UNIMPLEMENTED(WP_L)
/* USART1: PA9/PA10 */
ALTERNATE(PIN_MASK(A, 0x0600), GPIO_ALT_USART, MODULE_UART, GPIO_PULL_UP)